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Ixiasoft
1.5.1. Step 1: Getting Started
1.5.2. Step 2: Create Design Partitions
1.5.3. Step 3: Allocate Placement and Routing Regions
1.5.4. Step 4: Add the Partial Reconfiguration Controller IP
1.5.5. Step 5: Define Personas
1.5.6. Step 6: Create Revisions
1.5.7. Step 7: Compile the Base Revision
1.5.8. Step 8: Set Up PR Implementation Revisions
1.5.9. Step 9: Change the SUPR Logic
1.5.10. Step 10: Program the Board
1.5.11. Modifying the SUPR Partition
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Ixiasoft
1.2. Reference Design Overview
This reference design consists of one, 32-bit counter. At the board level, the design connects the clock to a 50MHz source, and then connects the output to four LEDs on the board. Selecting the output from the counter bits, in a specific sequence, causes the LEDs to blink at a specific frequency. The top_counter module is the SUPR region.
Figure 1. Flat Reference Design