Low Latency Ethernet 10G MAC Intel® FPGA IP User Guide

ID 683426
Date 11/17/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

6.6.3. Avalon® Streaming Data Interface Clocks

Table 43.  Clock Signals for the Avalon® Streaming Data Interfaces
Interface Signal Mode Use legacy Ethernet 10G MAC Avalon® streaming interface Option Clock Signal
avalon_st_tx_* 1G On tx_156_25_clk
Off tx_312_5_clk
10G On tx_156_25_clk
Off tx_312_5_clk
avalon_st_rx_* 1G On rx_156_25_clk
Off rx_312_5_clk
10G On rx_156_25_clk
Off rx_312_5_clk