Streaming DMA Accelerator Functional Unit User Guide: Intel FPGA Programmable Acceleration Card D5005

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ID 683424
Date 11/04/2019
Public
Document Table of Contents
Document Table of Contents x
1. About this Document 2. Streaming DMA AFU Description 3. Memory Map and Address Spaces 4. Software Programming Model 5. Running the AFU Example 6. Compiling the Accelerator Function (AF) 7. Simulating the AFU Example 8. Streaming DMA Accelerator Functional Unit User Guide Archive 9. Document Revision History for Streaming DMA Accelerator Functional Unit User Guide
1. About this Document x
1.1. Intended Audience 1.2. Conventions 1.3. Acronyms 1.4. Acceleration Glossary
2. Streaming DMA AFU Description x
2.1. Hardware Subsystems 2.2. Streaming DMA Test System 2.3. Memory-to-Stream DMA BBB 2.4. Stream-to-Memory DMA BBB
3. Memory Map and Address Spaces x
3.1. Streaming DMA AFU Memory Map 3.2. Memory-to-Stream DMA BBB Memory Map 3.3. Stream-to-Memory DMA BBB Memory Map
5. Running the AFU Example x
5.1. Optimization for Improved DMA Performance
1. About this Document
2. Streaming DMA AFU Description
3. Memory Map and Address Spaces
4. Software Programming Model
5. Running the AFU Example
6. Compiling the Accelerator Function (AF)
7. Simulating the AFU Example
8. Streaming DMA Accelerator Functional Unit User Guide Archive
9. Document Revision History for Streaming DMA Accelerator Functional Unit User Guide

7. Simulating the AFU Example

Intel recommends you refer to the Intel Accelerator Functional Unit (AFU) Simulation Environment (ASE) Quick Start Guide for your Intel® PAC to be familiar with simulating similar examples and to setup your environment. Before you proceed through the following steps, verify that the OPAE_PLATFORM_ROOT environment variable is set to the OPAE SDK installation directory.

Complete the following steps to setup the hardware simulator for the streaming DMA AFU:

  1. Change to the streaming DMA AFU sample directory: 
    cd $OPAE_PLATFORM_ROOT/hw/samples/streaming_dma_afu
  2. Create an ASE environment in a new directory and configure it for simulating an AFU: 
    afu_sim_setup --source hw/rtl/filelist.txt build_ase_dir
  3. Change to the ASE build directory: 
    cd build_ase_dir
  4. Build the driver and application: 
    make
  5. Make simulation: 
    make sim
Sample output from the hardware simulator: 
[SIM]  ** ATTENTION : BEFORE running the software application **
[SIM]  Set env(ASE_WORKDIR) in terminal where application will run (copy-and-paste) =>
[SIM]  $SHELL   | Run:
[SIM]  ---------+---------------------------------------------------
[SIM]  bash/zsh | export ASE_WORKDIR=/mnt/Tools/ias/hw/samples/streaming_dma_afu/build_ase_dir/work
[SIM]  tcsh/csh | setenv ASE_WORKDIR /mnt/Tools/ias/hw/samples/streaming_dma_afu/build_ase_dir/work
[SIM]  For any other $SHELL, consult your Linux administrator
[SIM]  
[SIM]  Ready for simulation...
[SIM]  Press CTRL-C to close simulator...
Complete the following steps to compile and execute the streaming DMA AFU software in the simulation environment:
  1. Open a new terminal window.
  2. Change directory to:
    cd $OPAE_PLATFORM_ROOT/hw/samples/streaming_dma_afu/sw
  3. Copy the environment setup string (choose string appropriate for your shell) from the steps above in the hardware simulation to the terminal window. See the following lines in the sample output from the hardware simulator.
    [SIM]  bash/zsh | export ASE_WORKDIR=/mnt/Tools/ias/hw/samples/streaming_dma_afu/build_ase_dir/work
[SIM]  tcsh/csh | setenv ASE_WORKDIR /mnt/Tools/ias/hw/samples/streaming_dma_afu/build_ase_dir/work
  4. Compile the software:
    make USE_ASE=1
  5. Execute the host application to transfer 4 KB in 1 KB portions from the host memory to the FPGA pattern checker:
    ./fpga_dma_st_test -l off -s 4096 -p 1024 -r mtos -t fixed
  6. Execute the host application to transfer 4 KB in 1 KB portions from the FPGA pattern checker to the host memory:
    ./fpga_dma_st_test -l off -s 4096 -p 1024 -r stom -t fixed
  7. Execute the host application to transfer 4 KB in 1 KB portions from the host memory back to host memory in the loopback mode:
    ./fpga_dma_st_test -l on -s 4096 -p 1024 -t fixed
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