Streaming DMA Accelerator Functional Unit User Guide: Intel FPGA Programmable Acceleration Card D5005

ID 683424
Date 11/04/2019
Public

9. Document Revision History for Streaming DMA Accelerator Functional Unit User Guide

Document Version Intel Acceleration Stack Version Changes
2019.11.04 2.0.1 (supported with Intel® Quartus® Prime Pro Edition Edition 19.2)
  • Updated the description of AFU DFH and clarified the pipeline bridge names in the following sections:
    • Memory-to-Stream DMA BBB
    • Stream-to-Memory DMA BBB
  • Updated the description of 2:1 Multiplexer register in Table: Streaming DMA AFU Memmory Map.
  • Updated section Software Programming Model for minor edits.
  • Replaced the fpgaconf with fpgasupdate when configuring the FPGA with the prebuild AFU in section Running the AFU Example.
  • Modified a command to generate an AF image in section Compiling the Accelerator Function (AF).
2019.08.05 2.0 (supported with Intel® Quartus® Prime Pro Edition 18.1.2) Initial release.