Unified FFT Intel® FPGA IPs User Guide

ID 683366
Date 6/17/2024
Public

2.2. Generating a Unified FFT IP

To include the IP in a design, generate the IP in the Quartus® Prime software. Or optionally, you can generate a design example.
  1. Create a New Quartus® Prime project.
  2. Open IP Catalog.
  3. Select DSP > Transforms > Unified FFT and click Add
  4. Enter a name for your IP variant and click Create.
    The name is for both the top-level RTL module and the corresponding .ip file.
    The parameter editor for this IP appears.
  5. Choose your parameters.
    Figure 2. Parameter Editor
  6. Click Generate HDL.