Unified FFT Intel® FPGA IPs User Guide

ID 683366
Date 6/17/2024
Public

2.4. Running the Unified FFT IPs Automatic Testbench

Intel provides an automatic testbench as part of the simulation fileset.
  1. Navigate to the appropriate simulator directory in the sim folder. For example, sim/mentor for ModelSim
  2. Run the appropriate setup script within the simulator, for example, msim_setup.tcl for ModelSim.
  3. Follow the instructions and set the TOP_LEVEL_NAME to the name of the testbench.
    The name of the testbench is in the information window when the simulation fileset is generated. For example, you may see:
    Info: intel_FPGA_unified_fft_0: To run testbench, generate the Qsys testbench system and set TOP_LEVEL_NAME to intel_FPGA_unified_fft_10.my_fft_intel_FPGA_unified_fft_10_4xf52ey_atb to simulate the IP core