AN 492: CF+ Interface Using Altera MAX Series

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ID 683351
Date 9/22/2014
Public
Document Table of Contents
Document Table of Contents x
1. CF+ Interface Using Altera MAX Series
1. CF+ Interface Using Altera MAX Series x
1.1. Using the CF+ Interface with Altera Devices 1.2. Implementation 1.3. Acknowledgments 1.4. Document Revision History
1.1. Using the CF+ Interface with Altera Devices x
1.1.1. Signals
1.2. Implementation x
1.2.1. Source Code
1. CF+ Interface Using Altera MAX Series

1.2. Implementation

These designs may be implemented using MAX II, MAX V, and MAX 10 devices. The provided design source codes target the MAX II (EPM240) and MAX 10 (10M08) respectively. These design source codes are compiled and can be programmed directly to the MAX devices.

For the MAX II design example, map the host and CF+ interfacing ports to suitable GPIOs. This design utilizes about 54% of the total LEs in an EPM240 device and uses 45 I/O pins.

The MAX II design example uses a CF+ device, which functions in two modes: PC Card ATA using I/O mode and PC Card ATA using memory mode. The third optional mode, True IDE mode, is not considered. The MAX II device operates as the host controller and acts as a bridge between the host and the CF+ card.


Section Content
Source Code

Level Two Title