Intel® Quartus® Prime Design Suite Version 18.1 Update Release Notes

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ID 683328
Date 4/17/2019
Public
Document Table of Contents
Document Table of Contents x
1. Intel® Quartus® Prime Design Suite Version 18.1 Update Release Notes 2. Issues Addressed in Update 1 3. Issues Addressed in Update 2 4. Software Issues Resolved 5. Software Patches Included in Update Releases 6. Known Issues and Workarounds A. Document Revision History for Intel® Quartus® Prime Design Suite Update Release Notes
2. Issues Addressed in Update 1 x
2.1. Intel® Quartus® Prime Pro Edition Software 2.2. Intel® Quartus® Prime Standard Edition Software 2.3. IP and IP Cores 2.4. DSP Builder for Intel® FPGAs 2.5. Intel High Level Synthesis Compiler 2.6. Intel FPGA SDK for OpenCL*
3. Issues Addressed in Update 2 x
3.1. Intel® Quartus® Prime Pro Edition Software 3.2. IP and IP Cores 3.3. Intel FPGA SDK for OpenCL
1. Intel® Quartus® Prime Design Suite Version 18.1 Update Release Notes
2. Issues Addressed in Update 1
3. Issues Addressed in Update 2
4. Software Issues Resolved
5. Software Patches Included in Update Releases
6. Known Issues and Workarounds
A. Document Revision History for Intel® Quartus® Prime Design Suite Update Release Notes

2.6. Intel FPGA SDK for OpenCL*

See the section for your edition of the Intel FPGA SDK for OpenCL* to learn about issues fixed and changes in Intel FPGA SDK for OpenCL* Version 18.1 Update 1:

Changes in Intel FPGA SDK for OpenCL* Pro Edition Version 18.1 Update 1

  • Fixed an error that occurred when reading data from a channel directly into the __local address space.
  • Fixed an issue preventing some diagnostic messages from printing when you compiled kernel code for the fast emulator platform. In some rare cases, kernel compilations for the fast emulator failed without printing any useful error messages.
  • Fixed an issue where all pointer parameters in OpenCL* kernels were incorrectly marked as __restrict.
  • Fixed an issue where, in complex scenarios, a channel read in an autorun kernel might have forwarded data too soon.
  • Removed cl_khr_3d_image_writes from the list of extensions advertised by the Intel FPGA SDK for OpenCL Runtime. This extension was advertised by mistake in previous releases.
  • Fixed a bug that cause a crash when using multiple channels.
  • Increased the maximum number of allowable identical abbreviated file names in OpenCL kernels from 1000 to 1000000.
  • Set the INTELFPGA_CL macro to the version number of the compiler to enable users to version their code based on compiler version.
  • Fixed issues with #pragma ivdep which might cause a segmentation fault when the pragma is used with array clauses.
  • For Intel® Stratix® 10 devices, improved the stability of the OpenCL incremental compilation.
  • Fixed an incremental compilation bug caused by an internal naming issue.
  • Fixed an issue in the RTE where the aocl version command returned the following error:
    aocl: Detailed error: Could not determine the path to SDK internal libraries

Changes in Intel FPGA SDK for OpenCL* Standard Edition Version 18.1 Update 1

  • On Linux platforms, separately downloadable installers are now available for the following board support packages (BSPs). The BSPs also remain packaged with the Intel® FPGA SDK for OpenCL™ .
  • On Windows platforms, the Cyclone® V SoC Development Kit Reference Platform (c5soc) BSP is now available as a separately downloadable BSP installer. The BSP also remains packaged with the Intel® FPGA SDK for OpenCL™ .
    Download the following package from the Download Center for FPGAs - Intel® FPGA SDK for OpenCL™ page:
    • Intel FPGA OpenCL Board Support Package for Cyclone V SoC Windows x86-64 ZIP
  • On Windows platforms, removed the Stratix® V Network Reference Platform board support package (s5_ref) from the Intel® FPGA SDK for OpenCL™ package.

    To use this BSP with Intel® FPGA SDK for OpenCL™ Standard Edition Version 18.1 Update 1, extract the Version 18.1 BSP (hld\board\s5_ref) from the Intel® FPGA SDK for OpenCL™ Standard Edition Version 18.1 download package and compile the BSP with Intel® Quartus® Prime Standard Edition Version 18.1 Update 1.

*OpenCL™ and the OpenCL logo are trademarks of Apple Inc. used by permission of the Khronos Group™.

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