Visible to Intel only — GUID: vcj1498169396087
Ixiasoft
1.1. Open the Example Design
1.2. Specify EDA Tool Settings
1.3. Generate a Simulator Setup Script Template
1.4. Modify the Simulator Setup Script
1.5. Compile and Simulate the Design
1.6. View Signal Waveforms
1.7. Add Signals to the Simulation
1.8. Rerun Simulation
1.9. Modify the Simulation Testbench
Visible to Intel only — GUID: vcj1498169396087
Ixiasoft
1.8. Rerun Simulation
You must rerun the simulation if you make changes to the simulation setup, such as adding signals to the Wave window, or modifying the testbench_1.v file. Follow these steps to rerun simulation:
- In the ModelSim* - Intel® FPGA Edition simulator, click Simulate > Restart. Retain the default options and click OK. These options clear the waveforms and restart the simulation time, while retaining the necessary signals and settings.
Note: Alternatively, you can re-run the /PLL_RAM/mentor/mentor_example.do script to re-run simulation at the command line.
- Click Simulate > Run > Run -all. The testbench_1.v file simulates according to the testbench specifications. To continue simulation, click Simulate > Run > Continue. This command continues the simulation until you click the Stop button.