Intel® Quartus® Prime Pro Edition Settings File Reference Manual

ID 683296
Date 12/13/2021
Public

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Document Table of Contents

FLOW_ENABLE_RTL_VIEWER

Allows the Netlist Viewers to process the schematic during design compilation. Turning on this option reduces the time required to open the Netlist Viewers at the expense of increased compilation time.

Type

Boolean

Device Support

  • This setting can be used in projects targeting any Intel FPGA device family.

Syntax


set_global_assignment -name FLOW_ENABLE_RTL_VIEWER <value>

Default Value

Off