Interface Current between Supported Intel® Devices
The supported Intel® devices can drive into each other without termination for certain drive strengths using the 3.3 V, 3.0 V, or 2.5 V LVTTL or LVCMOS I/O standards.
Driver I/O Standard | Drive Strength | Receiver Bank VCCIO(V)3 | ||
---|---|---|---|---|
2.5 ± 5% | 3.0 ± 5% | 3.3 ± 5% | ||
2.5 V LVTTL | 4 mA | Yes | Yes | Yes |
8 mA | Yes | Yes | Yes | |
12 mA | Yes | Yes | — | |
16 mA | Yes | Yes | — | |
3.0 V LVTTL | 4 mA | Yes | Yes | Yes |
8 mA | Yes | Yes | Yes | |
12 mA | — | Yes | — | |
16 mA | — | Yes | — | |
3.0 V LVCMOS | 4 mA | Yes | Yes | Yes |
8 mA | — | Yes | — | |
12 mA | — | Yes | — | |
16 mA | — | Yes | — | |
3.3 V LVTTL | 4 mA | Yes | Yes | Yes |
8 mA | 4 | Yes | Yes | |
3.3 V LVCMOS | 2 mA | 4 | Yes | Yes |
3 The Intel® Quartus® Prime software enables the PCI clamp diode for pins assigned as 3.3 V, 3.0 V, or 2.5 V LVTTL or LVCMOS I/O standards by default.
4 With the PCI clamp diode enabled, the supported Intel® devices—at this I/O standard, drive strength, and receiver bank VCCIO combination—cannot drive each other unterminated. To use this combination without violating the specifications, disable the PCI clamp diode.