AN 447: Interfacing Intel® FPGA Devices with 3.3/3.0/2.5 V LVTTL/LVCMOS I/O Systems

Download PDF
ID 683295
Date 3/28/2022
Public
Document Table of Contents
Document Table of Contents x
Interfacing Intel® FPGA Devices with 3.3/3.0/2.5 V LVTTL/LVCMOS I/O Systems
Interfacing Intel® FPGA Devices with 3.3/3.0/2.5 V LVTTL/LVCMOS I/O Systems x
Receiver Level Requirements Guideline: Use Internal PCI Clamp Diode on the Pin Guideline: Use Series Termination Resistor Guideline: Select Appropriate Driver Interface Current between Supported Intel® Devices Document Revision History for AN 447: Interfacing Intel FPGA Devices with 3.3/3.0/2.5 V LVTTL/LVCMOS I/O Systems
Guideline: Use Internal PCI Clamp Diode on the Pin x
Measuring DC Current with PCI Clamp Diode
Guideline: Use Series Termination Resistor x
Selecting Appropriate Series Termination Resistor Value Example of Determining Series Termination Resistor Value
Guideline: Select Appropriate Driver x
Driver Selection Reference Current Limits Measurement Examples Evaluating Interface Using Driver Selection Method
Interfacing Intel® FPGA Devices with 3.3/3.0/2.5 V LVTTL/LVCMOS I/O Systems

Document Revision History for AN 447: Interfacing Intel FPGA Devices with 3.3/3.0/2.5 V LVTTL/LVCMOS I/O Systems

Document Version Changes
2022.03.28
  • Updated the table listing the receiver level requirements for 3.3/3.0/2.5 V LVTTL/LVCMOS.
  • Updated the topic about measuring the DC current with the PCI clamp diode.
  • Updated "Mentor Graphics* Corporation" to "Siemens* EDA".
  • Updated the topic about the driver selection reference.
  • Updated links.
Date Version Changes
November 2017 2017.11.06
  • Added support for Intel® Cyclone® 10 LP devices.
  • Rebranded as Intel.
  • Changed instances of Quartus II to Intel® Quartus® Prime.
  • Updated all instances of " Cyclone® II" to " Intel® FPGA".
May 2016 2016.05.30 Corrected an error in the table listing the maximum allowed current metrics required to drive the supported devices without termination. The text in the last row has been corrected from "3.0 V LVCMOS" to "3.3 V LVCMOS".
December 2014 2014.12.15
  • Added support for MAX 10 devices.
  • Restructured and rewritten the document to improve clarity and for easier reference.
  • Updated template.
November 2009 2.0
  • Updated all Cyclone IV device references.
  • Removed "Introduction" heading.
  • Removed "Referenced Documents" section.
June 2009 1.2
  • Updated to include Cyclone III LS devices information.
    • Updated "Introduction" on page 1.
    • Updated "Background" on page 1.
    • Updated "Design Guideline" on page 2.
    • Updated Table 1 on page 2, Table 3 on page 10, Table 4 on page 14.
    • Updated "PCI-Clamp Diode" on page 3.
    • Updated "Termination" on page 4.
    • Updated "Conclusion" on page 5.
    • Updated "Appendix A: DC Current Measurement with PCI-Clamp Diode" on page 5, "Appendix C: Driver Selection Table and Measurement Method" on page 9, "Appendix D: Cyclone III Device Family to Cyclone III Device Family Interface Matrix" on page 14.
    • Updated Figure 2 on page 5, Figure 10 on page 10, Figure 11 on page 11, Figure 12 on page 12.
    • Updated "Referenced Documents" on page 14.
April 2008 1.1
  • Added Figure 10, Figure 11, and Figure 12.
  • Added new note on configuration pins under PCI-Clamp Diode section.
  • Added new paragraph under Appendix C: Driver Selection Table and Measurement Method section.
March 2007 1.0 Initial release.
Level Two Title