Quartus® Prime Standard Edition User Guide: Design Compilation
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2.5.2.6.1. Example—Clock Signal Inversion
The figure shows the clock signal inversion in the destination partitions.
Notice that this diagram also shows another example of a single pin feeding two ports of a partition boundary. In the left diagram, partition B does not have the information that the clock and inverted clock come from the same source. In the right diagram, partition B has more information to help optimize the design because the clock is connected as one port of the partition.