AN 494: GPIO Pin Expansion Using I2C Bus Interface in Altera MAX Series

Download PDF
ID 683261
Date 9/22/2014
Public
Document Table of Contents
Document Table of Contents x
1. GPIO Pin Expansion Using I2C Bus Interface in Altera MAX Series
1. GPIO Pin Expansion Using I2C Bus Interface in Altera MAX Series x
1.1. GPIO Pin Expansion and I2C 1.2. I2C Interface for GPIO Pin Expansion 1.3. GPIO Pin Expansion Using I2C Bus Interface Using MAX II Devices 1.4. Acknowledgments 1.5. Document Revision History
1.2. I2C Interface for GPIO Pin Expansion x
1.2.1. I2C Interface 1.2.2. GPIO Interface
1.3. GPIO Pin Expansion Using I2C Bus Interface Using MAX II Devices x
1.3.1. Design Demonstration on the MDN-B2 Demo Board
1. GPIO Pin Expansion Using I2C Bus Interface in Altera MAX Series

1.2.2. GPIO Interface

Whenever the master issues a write condition (R/W=0), the data received on the I2C bus is used to update the general purpose output pins until a stop or a repeat start condition is encountered. Similarly, when the I2C master issues a read condition (R/W = 1), the values at the general purpose input pins are sampled at the ACK bit and transmitted serially over the I2C bus. This process continues until the master issues a stop or repeat start.

Table 2.  GPIO Pin Description
Signal Purpose Direction
8-bit Input General In
8-bit Output General Out
Level Two Title