25G Ethernet Stratix® 10 Intel® FPGA IP Design Example User Guide

ID 683252
Date 6/20/2024
Public
Document Table of Contents

3.1. Features

  • Supports single Ethernet channel operating at 25G.
  • Generates design example with IEEE 1588v2 feature.
  • Generates design example with RS-FEC feature.
  • Generates design example separately from Stratix® 10 Transceiver Native PHY.
  • Provides testbench and simulation script.