1.1. Open the Example Design
The PLL_RAM example design includes Intel® FPGA IP cores to demonstrate the basic simulation flow. Download the example design files and open the project in the Intel® Quartus® Prime software.
Note: This Quick-Start requires a basic understanding of hardware description language syntax and the Intel® Quartus® Prime design flow, as the Intel® Quartus® Prime Standard Edition Foundation Online Training describes.
- Download and unzip the Quartus_STD_LITE_PLL_RAM.zip design example.
- Launch the Intel® Quartus® Prime Standard Edition software.
- To open the example design project, click pll_ram.qpf project file, and then click OK. , select the