O-RAN Intel® FPGA IP User Guide

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ID 683238
Date 7/15/2024
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Document Table of Contents
Document Table of Contents x
1. About the O-RAN Intel® FPGA IP 2. Getting Started with the O-RAN Intel® FPGA IP 3. O-RAN IP Functional Description 4. O-RAN IP Registers 5. O-RAN Intel FPGA IP User Guide Archive 6. Document Revision History for the O-RAN Intel® FPGA IP User Guide
1. About the O-RAN Intel® FPGA IP x
1.1. O-RAN Intel® FPGA IP Features 1.2. O-RAN Intel® FPGA IP Device Family Support 1.3. Release Information for the O-RAN Intel® FPGA IP 1.4. O-RAN Intel® FPGA IP Performance and Resource Utilization
2. Getting Started with the O-RAN Intel® FPGA IP x
2.1. Obtaining, Installing, and Licensing the O-RAN IP 2.2. Parameterizing the O-RAN IP 2.3. Generated IP File Structure
2.2. Parameterizing the O-RAN IP x
2.2.1. O-RAN IP Parameters
3. O-RAN IP Functional Description x
3.1. O-RAN IP Signals 3.2. O-RAN Intel® FPGA IP Error Handling 3.3. O-RAN Reset Transactions 3.4. O-RAN IP Streaming Mode 3.5. O-RAN IP Performance Counters 3.6. O-RAN IP Transmission and Reception Window Threshold 3.7. O-RAN IP Fragmentation 3.8. O-RAN IP U-Plane Packet Size
3.6. O-RAN IP Transmission and Reception Window Threshold x
3.6.1. O-RAN IP Examples for Transmission and Reception Window Thresholds
1. About the O-RAN Intel® FPGA IP
2. Getting Started with the O-RAN Intel® FPGA IP
3. O-RAN IP Functional Description
4. O-RAN IP Registers
5. O-RAN Intel FPGA IP User Guide Archive
6. Document Revision History for the O-RAN Intel® FPGA IP User Guide

1.4. O-RAN Intel® FPGA IP Performance and Resource Utilization

The resource utilization of the O-RAN IP targeting an Agilex™ 5 device (SM7_PART1), Agilex™ 7 device (AGFB014R24A2E3V), Agilex™ 9 device (AGRM027R31D3I3V), Intel Arria 10 device (10AX115S2F45I1SG), and Intel Stratix 10 device (1ST280EY2F55E2VG).

The O-RAN IP operates at a 390.625 MHz synchronous clock frequency (or 156.25 MHz for Intel Arria 10 devices) with the Ethernet MAC Intel FPGA IP.

Table 4.  Resource UtilizationIntel generated the resource data with streaming mode.
Device IP ALMs Logic Registers Memory 20K
Primary Secondary
Agilex™ 5 O-RAN mapper and demapper 13,713 19,683 4,411 46
Including compression and decompression 48,627 80,703 16,776 75
Agilex™ 7 O-RAN mapper and demapper 14,221 20,097 4,095 37
Including compression and decompression 48,957 81,336 16,463 66
Agilex™ 9 O-RAN mapper and demapper 13,663 20,103 4,415 37
Including compression and decompression 48,189 81,505 16,263 66
Intel Arria 10 O-RAN mapper and demapper 12,039 16,219

4,898

 32
Including compression and decompression 43,175 62,655

22,079

 62
Intel Stratix 10 O-RAN mapper and demapper 15,362 22,443

3,820

 37
Including compression and decompression 55,266 94,058

15,998

66
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