Guidelines for Developing a Nios II HAL Device Driver

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ID 683146
Date 6/12/2015
Public
Document Table of Contents
Document Table of Contents x
1. Guidelines for Developing a Nios II HAL Device Driver
1. Guidelines for Developing a Nios II HAL Device Driver x
1.1. Prerequisites for HAL Device Driver Development 1.2. Developing the HAL UART Device Driver 1.3. Debugging the bit_bang_uart Project 1.4. The BitBangUartTransmit() Function 1.5. The BitBangUartReceive() Function 1.6. Creating Device Hardware Access Macros 1.7. Staging the HAL Device Driver Development 1.8. Understanding the Hardware-Specific INSTANCE and INIT Macros 1.9. Integrating a New HAL Device Driver in the BSP 1.10. Understanding HAL Mutual Exclusion Resources 1.11. Overview of Debugging Tools for HAL Device Drivers 1.12. Debugging the HAL UART Device Driver 1.13. Conclusion 1.14. Document Revision History
1.1. Prerequisites for HAL Device Driver Development x
1.1.1. Using the HAL Architecture and Services 1.1.2. Software Requirements for the Driver Example 1.1.3. HAL Device Drivers and Components
1.2. Developing the HAL UART Device Driver x
1.2.1. Preparing the bit_bang_uart Application and hal_my_uart BSP 1.2.2. Preparing the my_uart_driver Device Driver 1.2.3. Configuring the Altera_Avalon_UART Component 1.2.4. Importing Projects 1.2.5. Verifying Software Functionality 1.2.6. Preview: Customizing the Design
1.2.6. Preview: Customizing the Design x
1.2.6.1. Making Software Modifications 1.2.6.2. Making Hardware Modifications
1.12. Debugging the HAL UART Device Driver x
1.12.1. Setting Breakpoints in the my_uart_driver Device Driver 1.12.2. Setting Watchpoints in the HAL UART Device Driver 1.12.3. Reducing Driver Code and Memory Footprint 1.12.4. Interrupt Latency and Determinism 1.12.5. Debugging with the Altera Logging Functions
1.12.3. Reducing Driver Code and Memory Footprint x
1.12.3.1. Using the Reduced Device Drivers API Option 1.12.3.2. Using the Lightweight Device Drivers API Option
1.12.5. Debugging with the Altera Logging Functions x
1.12.5.1. Altera Logging Usage 1.12.5.2. Altera Logging Example
1. Guidelines for Developing a Nios II HAL Device Driver

1.11. Overview of Debugging Tools for HAL Device Drivers

The Nios II EDS and Quartus II software tools provide a variety of mechanisms for debugging device drivers:

  • You can monitor individual component instance signals for activity with the SignalTap™ II logic analyzer. For example, you can hook up the SignalTap II logic analyzer to the UART hardware transmit line to watch for any activity while you write characters to the Altera_Avalon_UART component instance through the my_uart_driver device driver.

For information about using SignalTap II with Nios II systems, refer to AN446: Debugging Nios II Systems with the SignalTap II Embedded Logic Analyzer.

  • You can step into the fprintf() function, stepping through the various layers of abstraction until you reach the HAL’s invocation of my_uart_write() function in the my_uart_driver device driver.
  • You can set breakpoints in the driver’s ISRs, or set watchpoints on UART memory-mapped registers to pause the processor when a character is received.
    Note: Use caution when setting a breakpoint in an ISR. When you resume, there might be problems with other devices, if they generated interrupts that were not handled. However, sometimes the best way to debug a specific device driver is to set a breakpoint in it. When this technique is required, you can reset or download the software containing the device driver again when you are done with a particular debugging session.

These mechanisms can help you diagnose an incorrectly configured system. For example, if the interrupt controller receives a spurious interrupt signal, the interrupt might not be properly handled. When interrupts are enabled after low-level system initialization, there is no way to clear the interrupt source. As a result, the application does not work correctly. The Nios II SBT for Eclipse debugger might even stop communicating with the processor.

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