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Ixiasoft
1.1. Reed-Solomon II versus High-Speed Reed Solomon Intel® FPGA IP
1.2. High-speed Reed-Solomon IP Core Features
1.3. High-Speed Reed-Solomon IP Device Family Support
1.4. DSP IP Core Verification
1.5. High-speed Reed-Solomon IP Core Release Information
1.6. High-speed Reed-Solomon IP Core Performance and Resource Utilization
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Ixiasoft
1.2. High-speed Reed-Solomon IP Core Features
- High-performance greater than 100 Gbps encoder or decoder for error detection and correction:
- Fully parameterizable:
- Number of bits per symbol
- Number of symbols per codeword
- Number of check symbols per codeword
- Field polynomial
- Multichannels and backpressure for decoders
- Fracturable decoder that supports 100 Gbps Ethernet (GbE), 2 x 50 GbE, and 4 x 25 GbE
- Avalon® Streaming (Avalon-ST) interfaces
- Testbenches to verify the IP core
- IP functional simulation models for use in Intel-supported VHDL and Verilog HDL simulators