Intel® Quartus® Prime Standard Edition User Guide: Timing Analyzer

ID 683068
Date 2/21/2024
Public
Document Table of Contents

2.3.4. Creating Clocks and Clock Constraints

You must define all clocks and any associated clock characteristics, such as uncertainty, latency or skew. The Timing Analyzer supports .sdc commands that accommodate various clocking schemes, such as:

  • Base clocks
  • Virtual clocks
  • Multifrequency clocks
  • Generated clocks