Visible to Intel only — GUID: mwh1410383691035
Ixiasoft
Visible to Intel only — GUID: mwh1410383691035
Ixiasoft
2.3.4.1. Creating Base Clocks
The following examples show common use of the create_clock constraint:
create_clock Command
The following specifies a 100 MHz requirement on a clk_sys input clock port:
create_clock -period 10 -name clk_sys [get_ports clk_sys]
100 MHz Shifted by 90 Degrees Clock Creation
The following creates a 10 ns clock, with a 50% duty cycle, that is phase shifted by 90 degrees, and applies to port clk_sys. This type of clock definition commonly refers to source synchronous, double-rate data that is center-aligned with respect to the clock.
create_clock -period 10 -waveform { 2.5 7.5 } [get_ports clk_sys]
Two Oscillators Driving the Same Clock Port
You can apply multiple clocks to the same target with the -add option. For example, to specify that you can drive the same clock input at two different frequencies, enter the following commands in your .sdc file:
create_clock -period 10 -name clk_100 [get_ports clk_sys] create_clock -period 5 -name clk_200 [get_ports clk_sys] -add
Although uncommon to define more than two base clocks for a port, you can define as many as are appropriate for your design, making sure you specify -add for all clocks after the first.
Creating Multifrequency Clocks
You must create a multifrequency clock if your design has more than one clock source feeding a single clock node. The additional clock may act as a low-power clock, with a lower frequency than the primary clock. If your design uses multifrequency clocks, use the set_clock_groups command to define clocks that are exclusive.
Use the create_clock command with the -add option to create multiple clocks on a clock node. You can create a 10 ns clock applied to clock port clk, and then add an additional 15 ns clock to the same clock port. The Timing Analyzer analyzes both clocks.
create_clock –period 10 –name clock_primary –waveform { 0 5 } \ [get_ports clk] create_clock –period 15 –name clock_secondary –waveform { 0 7.5 } \ [get_ports clk] -add