Intel® FPGA SDK for OpenCL™ Standard Edition: Cyclone® V SoC Getting Started Guide

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ID 683030
Date 4/20/2022
Public
Document Table of Contents
Document Table of Contents x
1. Intel® FPGA SDK for OpenCL™ Standard Edition Cyclone V SoC Getting Started Guide 2. Setting Up the Intel® FPGA SDK for OpenCL™ , Intel® SoC FPGA Embedded Design Suite, and the Cyclone V SoC Development Kit for Windows 3. Setting Up the Intel® FPGA SDK for OpenCL™ , Intel® SoC FPGA Embedded Design Suite, and the Cyclone V SoC Development Kit for Linux A. Document Revision History of the Intel® FPGA SDK for OpenCL™ Standard Edition Cyclone® V SoC Getting Started Guide
1. Intel® FPGA SDK for OpenCL™ Standard Edition Cyclone V SoC Getting Started Guide x
1.1. Prerequisites for the Intel® FPGA SDK for OpenCL™ Standard Edition 1.2. Contents of the Intel® FPGA SDK for OpenCL™ Standard Edition 1.3. Overview of the Intel® FPGA SDK for OpenCL™ Standard Edition and Cyclone® V SoC Development Kit Setup Processes 1.4. Overview of the Intel® FPGA SDK for OpenCL™ Cyclone V SoC Programming Flow 1.5. Cyclone V SoC Development Kit Reference Platform Board Variants 1.6. Cyclone V SoC FPGA-Specific OpenCL Design Considerations
2. Setting Up the Intel® FPGA SDK for OpenCL™ , Intel® SoC FPGA Embedded Design Suite, and the Cyclone V SoC Development Kit for Windows x
2.1. Upgrading to Current Version of Intel FPGA SDK for OpenCL for Cyclone® V SoC FPGA 2.2. Downloading the Intel® FPGA SDK for OpenCL™ Standard Edition 2.3. Downloading the Intel® SoC FPGA Embedded Development Suite 2.4. Installing the Intel® FPGA SDK for OpenCL™ 2.5. Setting the Intel® FPGA SDK for OpenCL™ User Environment Variables for SoC FPGA 2.6. Installing the Intel® SoC FPGA Embedded Development Suite Standard Edition 2.7. Installing the Cyclone V SoC Development Kit 2.8. Downloading an OpenCL Design Example 2.9. Creating the Hardware Configuration File of an OpenCL Kernel for SoC FPGA 2.10. Executing an OpenCL Kernel on an SoC FPGA 2.11. Uninstalling the Software
2.7. Installing the Cyclone V SoC Development Kit x
2.7.1. Writing an SD Card Image onto the Micro SD Flash Card 2.7.2. Configuring the SW3 Switches 2.7.3. Setting Up Terminal Connection 2.7.4. Setting Environment Variables and Loading OpenCL Linux Kernel Driver 2.7.5. Connecting the Board to Network via Ethernet
2.7.5. Connecting the Board to Network via Ethernet x
2.7.5.1. Ensuring IP Address Acquisition 2.7.5.2. Using SSH and SCP
2.10. Executing an OpenCL Kernel on an SoC FPGA x
2.10.1. Building the Host Application 2.10.2. Running the Host Application 2.10.3. Output from Successful Kernel Execution on the Cyclone V SoC Development Kit
3. Setting Up the Intel® FPGA SDK for OpenCL™ , Intel® SoC FPGA Embedded Design Suite, and the Cyclone V SoC Development Kit for Linux x
3.1. Upgrading to Current Version of Intel FPGA SDK for OpenCL for Cyclone® V SoC FPGA 3.2. Downloading the Intel® FPGA SDK for OpenCL™ Standard Edition 3.3. Downloading the Intel® SoC FPGA Embedded Development Suite 3.4. Installing the Intel® FPGA SDK for OpenCL™ 3.5. Setting the Intel® FPGA SDK for OpenCL™ User Environment Variables for SoC FPGA 3.6. Installing the Intel® SoC FPGA Embedded Development Suite Pro Edition 3.7. Installing the Cyclone V SoC Development Kit 3.8. Verifying Host Runtime Functionality via Emulation 3.9. Creating the Hardware Configuration File of an OpenCL Kernel for SoC FPGA 3.10. Executing an OpenCL Kernel on an SoC FPGA 3.11. Uninstalling the Software
3.7. Installing the Cyclone V SoC Development Kit x
3.7.1. Writing an SD Card Image onto the Micro SD Flash Card 3.7.2. Configuring the SW3 Switches 3.7.3. Setting Up Terminal Connection 3.7.4. Setting Environment Variables and Loading OpenCL Linux Kernel Driver 3.7.5. Connecting the Board to Network via Ethernet
3.7.5. Connecting the Board to Network via Ethernet x
3.7.5.1. Ensuring IP Address Acquisition 3.7.5.2. Mounting a Shared Drive 3.7.5.3. Using SSH and SCP
3.8. Verifying Host Runtime Functionality via Emulation x
3.8.1. Downloading an OpenCL Design Example 3.8.2. Compiling a Kernel for Emulation (-march=emulator) 3.8.3. Building the Host Application 3.8.4. Emulating Your OpenCL Kernel
3.10. Executing an OpenCL Kernel on an SoC FPGA x
3.10.1. Running the Host Application 3.10.2. Output from Successful Kernel Execution on the Cyclone V SoC Development Kit
1. Intel® FPGA SDK for OpenCL™ Standard Edition Cyclone V SoC Getting Started Guide
2. Setting Up the Intel® FPGA SDK for OpenCL™ , Intel® SoC FPGA Embedded Design Suite, and the Cyclone V SoC Development Kit for Windows
3. Setting Up the Intel® FPGA SDK for OpenCL™ , Intel® SoC FPGA Embedded Design Suite, and the Cyclone V SoC Development Kit for Linux
A. Document Revision History of the Intel® FPGA SDK for OpenCL™ Standard Edition Cyclone® V SoC Getting Started Guide

1.5. Cyclone V SoC Development Kit Reference Platform Board Variants

The Intel® FPGA SDK for OpenCL™ Cyclone® V SoC Development Kit Reference Platform includes two board variants.
  • c5soc board

    This default board provides access to two DDR memory banks. The HPS DDR is accessible by both the FPGA and the CPU. The FPGA DDR is only accessible by the FPGA.

  • c5soc_sharedonly board

    This board variant contains only HPS DDR connectivity. The FPGA DDR is not accessible. This board variant is more area efficient because less hardware is necessary to support one DDR memory bank. The c5soc_sharedonly board is also a good prototyping platform for a final production board with a single DDR memory bank.

    To target this board variant when compiling your OpenCL kernel, include the -board=c5soc_sharedonly option in your aoc command.

    For more information about the -board=<board_name> option of the aoc command, refer to the Intel® FPGA SDK for OpenCL™ Standard Edition Programming Guide.

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