Intel® FPGA SDK for OpenCL™ Standard Edition: Cyclone® V SoC Getting Started Guide

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ID 683030
Date 4/20/2022
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Document Table of Contents
Document Table of Contents x
1. Intel® FPGA SDK for OpenCL™ Standard Edition Cyclone V SoC Getting Started Guide 2. Setting Up the Intel® FPGA SDK for OpenCL™ , Intel® SoC FPGA Embedded Design Suite, and the Cyclone V SoC Development Kit for Windows 3. Setting Up the Intel® FPGA SDK for OpenCL™ , Intel® SoC FPGA Embedded Design Suite, and the Cyclone V SoC Development Kit for Linux A. Document Revision History of the Intel® FPGA SDK for OpenCL™ Standard Edition Cyclone® V SoC Getting Started Guide
1. Intel® FPGA SDK for OpenCL™ Standard Edition Cyclone V SoC Getting Started Guide x
1.1. Prerequisites for the Intel® FPGA SDK for OpenCL™ Standard Edition 1.2. Contents of the Intel® FPGA SDK for OpenCL™ Standard Edition 1.3. Overview of the Intel® FPGA SDK for OpenCL™ Standard Edition and Cyclone® V SoC Development Kit Setup Processes 1.4. Overview of the Intel® FPGA SDK for OpenCL™ Cyclone V SoC Programming Flow 1.5. Cyclone V SoC Development Kit Reference Platform Board Variants 1.6. Cyclone V SoC FPGA-Specific OpenCL Design Considerations
2. Setting Up the Intel® FPGA SDK for OpenCL™ , Intel® SoC FPGA Embedded Design Suite, and the Cyclone V SoC Development Kit for Windows x
2.1. Upgrading to Current Version of Intel FPGA SDK for OpenCL for Cyclone® V SoC FPGA 2.2. Downloading the Intel® FPGA SDK for OpenCL™ Standard Edition 2.3. Downloading the Intel® SoC FPGA Embedded Development Suite 2.4. Installing the Intel® FPGA SDK for OpenCL™ 2.5. Setting the Intel® FPGA SDK for OpenCL™ User Environment Variables for SoC FPGA 2.6. Installing the Intel® SoC FPGA Embedded Development Suite Standard Edition 2.7. Installing the Cyclone V SoC Development Kit 2.8. Downloading an OpenCL Design Example 2.9. Creating the Hardware Configuration File of an OpenCL Kernel for SoC FPGA 2.10. Executing an OpenCL Kernel on an SoC FPGA 2.11. Uninstalling the Software
2.7. Installing the Cyclone V SoC Development Kit x
2.7.1. Writing an SD Card Image onto the Micro SD Flash Card 2.7.2. Configuring the SW3 Switches 2.7.3. Setting Up Terminal Connection 2.7.4. Setting Environment Variables and Loading OpenCL Linux Kernel Driver 2.7.5. Connecting the Board to Network via Ethernet
2.7.5. Connecting the Board to Network via Ethernet x
2.7.5.1. Ensuring IP Address Acquisition 2.7.5.2. Using SSH and SCP
2.10. Executing an OpenCL Kernel on an SoC FPGA x
2.10.1. Building the Host Application 2.10.2. Running the Host Application 2.10.3. Output from Successful Kernel Execution on the Cyclone V SoC Development Kit
3. Setting Up the Intel® FPGA SDK for OpenCL™ , Intel® SoC FPGA Embedded Design Suite, and the Cyclone V SoC Development Kit for Linux x
3.1. Upgrading to Current Version of Intel FPGA SDK for OpenCL for Cyclone® V SoC FPGA 3.2. Downloading the Intel® FPGA SDK for OpenCL™ Standard Edition 3.3. Downloading the Intel® SoC FPGA Embedded Development Suite 3.4. Installing the Intel® FPGA SDK for OpenCL™ 3.5. Setting the Intel® FPGA SDK for OpenCL™ User Environment Variables for SoC FPGA 3.6. Installing the Intel® SoC FPGA Embedded Development Suite Pro Edition 3.7. Installing the Cyclone V SoC Development Kit 3.8. Verifying Host Runtime Functionality via Emulation 3.9. Creating the Hardware Configuration File of an OpenCL Kernel for SoC FPGA 3.10. Executing an OpenCL Kernel on an SoC FPGA 3.11. Uninstalling the Software
3.7. Installing the Cyclone V SoC Development Kit x
3.7.1. Writing an SD Card Image onto the Micro SD Flash Card 3.7.2. Configuring the SW3 Switches 3.7.3. Setting Up Terminal Connection 3.7.4. Setting Environment Variables and Loading OpenCL Linux Kernel Driver 3.7.5. Connecting the Board to Network via Ethernet
3.7.5. Connecting the Board to Network via Ethernet x
3.7.5.1. Ensuring IP Address Acquisition 3.7.5.2. Mounting a Shared Drive 3.7.5.3. Using SSH and SCP
3.8. Verifying Host Runtime Functionality via Emulation x
3.8.1. Downloading an OpenCL Design Example 3.8.2. Compiling a Kernel for Emulation (-march=emulator) 3.8.3. Building the Host Application 3.8.4. Emulating Your OpenCL Kernel
3.10. Executing an OpenCL Kernel on an SoC FPGA x
3.10.1. Running the Host Application 3.10.2. Output from Successful Kernel Execution on the Cyclone V SoC Development Kit
1. Intel® FPGA SDK for OpenCL™ Standard Edition Cyclone V SoC Getting Started Guide
2. Setting Up the Intel® FPGA SDK for OpenCL™ , Intel® SoC FPGA Embedded Design Suite, and the Cyclone V SoC Development Kit for Windows
3. Setting Up the Intel® FPGA SDK for OpenCL™ , Intel® SoC FPGA Embedded Design Suite, and the Cyclone V SoC Development Kit for Linux
A. Document Revision History of the Intel® FPGA SDK for OpenCL™ Standard Edition Cyclone® V SoC Getting Started Guide

3.9. Creating the Hardware Configuration File of an OpenCL Kernel for SoC FPGA

The hardware configuration file of an OpenCL™ kernel is in the form of a .aocx executable file. To create the .aocx file for the hello_world example OpenCL application, you must first download and extract the example design from the OpenCL Design Examples page on the Intel® FPGA website. Then, compile the hello_world.cl kernel source file using the Intel® FPGA SDK for OpenCL™ Offline Compiler.

After you successfully install your FPGA board, you can create a .aocx file that executes on the device. Cyclone V SoC Development Kit Programming Overview outlines the procedure for programming the hello_world design example onto the Cyclone® V SoC FPGA. For more information about the OpenCL design examples, refer to the OpenCL Design Examples page.

Important: Before you program your Cyclone V SoC FPGA with the hardware image, ensure that your SoC FPGA contains an image created using the current version of the SDK.
  1. Verify that you set the environment variable AOCL_BOARD_PACKAGE_ROOT to point to the Cyclone V SoC Development Kit Reference Platform (that is, INTELFPGAOCLSDKROOT/board/c5soc).
    The init_opencl script you ran when installing the Cyclone V SoC Development Kit should have set the AOCL_BOARD_PACKAGE_ROOT environment variable. If the returned path does not include INTELFPGAOCLSDKROOT/board/c5soc, modify the AOCL_BOARD_PACKAGE_ROOT setting.
  2. Verify that you set the environment variable QUARTUS_ROOTDIR_OVERRIDE to point to the installation directory of the correct Intel® Quartus® Prime Standard Edition software.
  3. At a command prompt, navigate to the hello_world design.
  4. To list the SoC FPGA boards available in the Cyclone V SoC Development Kit Reference Platform, invoke the aoc -list-boards command.
    You should see an output similar to the one below: 
    Board list:
  c5soc
  c5soc_sharedonly
  5. To compile the kernel for your Cyclone V SoC Development Kit, invoke the following command:
    aoc -board=c5soc device/hello_world.cl -o=bin/hello_world.aocx
    This command performs the following tasks:
    • Generates the Intel® Quartus® Prime design project files from the OpenCL source code.
    • Checks for initial syntax errors.
    • Performs basic optimizations.
    • Creates a hello_world subfolder or subdirectory containing necessary intermediate files.
    • Creates the .aoco object file.
    • Creates the .aocx hardware configuration file and saves it in the bin subfolder or subdirectory.
    Attention:

    The .aocx file might take hours to build, depending on the complexity of the kernel. To view the progress of the compilation on-screen, include the -v flag in your aoc command (that is, aoc -v <your_kernel_filename>.cl).

    The offline compiler displays the line aoc: Hardware generation completed successfully. to signify the completion of the compilation process.

For more information about the -list-boards, -board=<board_name> , -v, and -o=<filename> options of the aoc command, refer to the Intel FPGA SDK for OpenCL Standard Edition Programming Guide.

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