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1. Intel® FPGA SDK for OpenCL™ Standard Edition Cyclone V SoC Getting Started Guide
2. Setting Up the Intel® FPGA SDK for OpenCL™ , Intel® SoC FPGA Embedded Design Suite, and the Cyclone V SoC Development Kit for Windows
3. Setting Up the Intel® FPGA SDK for OpenCL™ , Intel® SoC FPGA Embedded Design Suite, and the Cyclone V SoC Development Kit for Linux
A. Document Revision History of the Intel® FPGA SDK for OpenCL™ Standard Edition Cyclone® V SoC Getting Started Guide
1.1. Prerequisites for the Intel® FPGA SDK for OpenCL™ Standard Edition
1.2. Contents of the Intel® FPGA SDK for OpenCL™ Standard Edition
1.3. Overview of the Intel® FPGA SDK for OpenCL™ Standard Edition and Cyclone® V SoC Development Kit Setup Processes
1.4. Overview of the Intel® FPGA SDK for OpenCL™ Cyclone V SoC Programming Flow
1.5. Cyclone V SoC Development Kit Reference Platform Board Variants
1.6. Cyclone V SoC FPGA-Specific OpenCL Design Considerations
2.1. Upgrading to Current Version of Intel FPGA SDK for OpenCL for Cyclone® V SoC FPGA
2.2. Downloading the Intel® FPGA SDK for OpenCL™ Standard Edition
2.3. Downloading the Intel® SoC FPGA Embedded Development Suite
2.4. Installing the Intel® FPGA SDK for OpenCL™
2.5. Setting the Intel® FPGA SDK for OpenCL™ User Environment Variables for SoC FPGA
2.6. Installing the Intel® SoC FPGA Embedded Development Suite Standard Edition
2.7. Installing the Cyclone V SoC Development Kit
2.8. Downloading an OpenCL Design Example
2.9. Creating the Hardware Configuration File of an OpenCL Kernel for SoC FPGA
2.10. Executing an OpenCL Kernel on an SoC FPGA
2.11. Uninstalling the Software
3.1. Upgrading to Current Version of Intel FPGA SDK for OpenCL for Cyclone® V SoC FPGA
3.2. Downloading the Intel® FPGA SDK for OpenCL™ Standard Edition
3.3. Downloading the Intel® SoC FPGA Embedded Development Suite
3.4. Installing the Intel® FPGA SDK for OpenCL™
3.5. Setting the Intel® FPGA SDK for OpenCL™ User Environment Variables for SoC FPGA
3.6. Installing the Intel® SoC FPGA Embedded Development Suite Pro Edition
3.7. Installing the Cyclone V SoC Development Kit
3.8. Verifying Host Runtime Functionality via Emulation
3.9. Creating the Hardware Configuration File of an OpenCL Kernel for SoC FPGA
3.10. Executing an OpenCL Kernel on an SoC FPGA
3.11. Uninstalling the Software
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2.7.2. Configuring the SW3 Switches
Configure the SW3 dual in-line package (DIP) switches on the Cyclone® V SoC Development Kit for use with the Intel® FPGA SDK for OpenCL™. The switch bank is located next to the micro SD card slot.
Set the SW3 DIP switches to the following positions:
Switch | Configuration |
---|---|
1 | ON |
2 | OFF |
3 | ON |
4 | OFF |
5 | ON |
6 | ON |
The figure below illustrates the physical configuration of the SW switches on the Cyclone V SoC Development Kit: