50G Interlaken Design Example User Guide

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ID 683029
Date 10/31/2022
Public
Document Table of Contents
Document Table of Contents x
1. Quick Start Guide 2. Design Example Description A. Document Revision History for 50G Interlaken Design Example User Guide
1. Quick Start Guide x
1.1. Directory Structure 1.2. Design Components 1.3. Generating the Design 1.4. Simulating the Design 1.5. Compiling and Testing the Design
2. Design Example Description x
2.1. Features 2.2. Hardware and Software Requirements 2.3. Functional Description 2.4. Example Design Behavior 2.5. Interface Signals 2.6. Register Map
1. Quick Start Guide
2. Design Example Description
A. Document Revision History for 50G Interlaken Design Example User Guide

2.2. Hardware and Software Requirements

You can use the following hardware and software to test the example design:
  • Intel® Quartus® Prime software
  • System Console
  • VCS* , ModelSim* SE, Xcelium* , QuestaSim* , or Questa* Intel® FPGA Edition simulator
  • Intel® Arria® 10 GX Transceiver Signal Integrity Development Kit for hardware testing
Level Two Title