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Alphabetical Option List
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What Appears in the Compiler Option Descriptions
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Alternate Compiler Options
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ffreestanding, Qfreestanding
fjump-tables
fvec-peel-loops, Qvec-peel-loops
fvec-remainder-loops, Qvec-remainder-loops
fvec-with-mask, Qvec-with-mask
ipp-link, Qipp-link
mno-gather, Qgather-
mno-scatter, Qscatter-
qactypes, Qactypes
qdaal, Qdaal
qipp, Qipp
qmkl, Qmkl
qmkl-ilp64, Qmkl-ilp64
qmkl-sycl-impl, Qmkl-sycl-impl
qopt-assume-no-loop-carried-dep, Qopt-assume-no-loop-carried-dep
qopt-dynamic-align, Qopt-dynamic-align
qopt-for-throughput, Qopt-for-throughput
qopt-mem-layout-trans, Qopt-mem-layout-trans
qopt-multiple-gather-scatter-by-shuffles, Qopt-multiple-gather-scatter-by-shuffles
qopt-prefetch, Qopt-prefetch
qopt-prefetch-distance, Qopt-prefetch-distance
qopt-prefetch-loads-only, Qopt-prefetch-loads-only
qopt-streaming-stores, Qopt-streaming-stores
qopt-zmm-usage, Qopt-zmm-usage
qtbb, Qtbb
unroll, Qunroll
vec, Qvec
vec-threshold, Qvec-threshold
vecabi, Qvecabi
arch
ax, Qax
EH
fasynchronous-unwind-tables
fcf-protection, Qcf-protection
fdata-sections, Gw
fexceptions
ffunction-sections, Gy
fomit-frame-pointer
Gd
GR
guard
Gv
m, Qm
m64, Qm64
m80387
march
masm
mauto-arch, Qauto-arch
mbranches-within-32B-boundaries, Qbranches-within-32B-boundaries
mintrinsic-promote, Qintrinsic-promote
momit-leaf-frame-pointer
mtune, tune
regcall, Qregcall
x, Qx
xHost, QxHost
device-math-lib
fintelfpga
fiopenmp, Qiopenmp
flink-huge-device-code
fno-sycl-libspirv
foffload-static-lib
fopenmp
fopenmp-concurrent-host-device-compile, Qopenmp-concurrent-host-device-compile
fopenmp-declare-target-scalar-defaultmap, Qopenmp-declare-target-scalar-defaultmap
fopenmp-device-code-split, Qopenmp-device-code-split
fopenmp-device-lib
fopenmp-max-parallel-link-jobs, Qopenmp-max-parallel-link-jobs
fopenmp-target-buffers, Qopenmp-target-buffers
fopenmp-target-default-sub-group-size, Qopenmp-target-default-sub-group-size
fopenmp-target-loopopt, Qopenmp-target-loopopt
fopenmp-target-simd, Qopenmp-target-simd
fopenmp-targets, Qopenmp-targets
fsycl
fsycl-add-default-spec-consts-image
fsycl-add-targets
fsycl-dead-args-optimization
fsycl-device-code-split
fsycl-device-lib
fsycl-device-obj
fsycl-device-only
fsycl-early-optimizations
fsycl-enable-function-pointers
fsycl-esimd-force-stateless-mem
fsycl-explicit-simd
fsycl-force-target
fsycl-help
fsycl-host-compiler
fsycl-host-compiler-options
fsycl-id-queries-fit-in-int
fsycl-instrument-device-code
fsycl-link
fsycl-link-huge-device-code
fsycl-link-targets
fsycl-max-parallel-link-jobs
fsycl-optimize-non-user-code
fsycl-pstl-offload
fsycl-rdc
fsycl-remove-unused-external-funcs
fsycl-targets
fsycl-unnamed-lambda
fsycl-use-bitcode
ftarget-compile-fast
ftarget-export-symbols
ftarget-register-alloc-mode, Qtarget-register-alloc-mode
nolibsycl
qopenmp, Qopenmp
qopenmp-link
qopenmp-simd, Qopenmp-simd
qopenmp-stubs, Qopenmp-stubs
reuse-exe
Wno-sycl-strict
Xopenmp-target
Xs
Xsycl-target
ffp-accuracy, Qfp-accuracy
ffp-contract
fimf-absolute-error, Qimf-absolute-error
fimf-accuracy-bits, Qimf-accuracy-bits
fimf-arch-consistency, Qimf-arch-consistency
fimf-domain-exclusion, Qimf-domain-exclusion
fimf-max-error, Qimf-max-error
fimf-precision, Qimf-precision
fimf-use-svml, Qimf-use-svml
fma, Qfma
fp-model, fp
fp-speculation, Qfp-speculation
ftz, Qftz
pc, Qpc
w
W
Wabi
Wall
Wcheck-unicode-security
Wcomment
Wdeprecated
Werror, WX
Werror-all
Wextra-tokens
Wformat
Wformat-security
Wmain
Wmissing-declarations
Wmissing-prototypes
Wpointer-arith
Wreorder
Wreturn-type
Wshadow
Wsign-compare
Wstrict-aliasing
Wstrict-prototypes
Wtrigraphs
Wuninitialized
Wunknown-pragmas
Wunused-function
Wunused-variable
Wwrite-strings
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Example for aio_suspend Function
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Example for aio_error and aio_return Functions
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Example for lio_listio Function
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Offload Compilation, OpenMP*, and Parallel Processing Options
This section contains descriptions for compiler options that pertain to offload compilation, OpenMP*, or parallel processing. They are listed in alphabetical order.
Parent topic: Compiler Options
- device-math-lib
Enables or disables certain device libraries. - fintelfpga
Lets you perform ahead-of-time (AOT) compilation for the Field Programmable Gate Array (FPGA). - fiopenmp, Qiopenmp
Enables recognition of OpenMP* features, such as parallel, simd, and offloading directives, and tells the parallelizer to generate multi-threaded code based on OpenMP* directives. This is an alternate name for compiler option -qopenmp (and /Qopenmp). - flink-huge-device-code
Tells the compiler to place device code later in the linked binary. This is to prevent 32-bit PC-relative relocations between surrounding Executable and Linkable Format (ELF) sections when the device code is larger than 2GB. - fno-sycl-libspirv
Disables the check for libspirv (the SPIR-V* tools library). - foffload-static-lib
Tells the compiler to link with a fat (multi-architecture) static library. This is a deprecated option that may be removed in a future release. - fopenmp
Enables recognition of OpenMP* features and tells the parallelizer to generate multi-threaded code based on OpenMP* directives. This option leads to lowering of OpenMP constructs in the compiler front-end (as it is implemented by the LLVM community) and is expected to be not as performant as using the option -fiopenmp, which enables the Intel implementation of OpenMP constructs where the lowering is done in the compiler backend. Also, this option does not support offloading to GPUs. - fopenmp-concurrent-host-device-compile, Qopenmp-concurrent-host-device-compile
Enables parallel compilation of host and target compilation steps when performing OpenMP offload compilations. This is an experimental feature. - fopenmp-declare-target-scalar-defaultmap, Qopenmp-declare-target-scalar-defaultmap
Determines which implicit data-mapping/sharing rules are applied for a scalar variable referenced in a target pragma. - fopenmp-device-code-split, Qopenmp-device-code-split
Enables parallel compilation of SPIR-V* kernels for OpenMP offload Ahead-Of-Time compilation. - fopenmp-device-lib
Enables or disables certain device libraries for an OpenMP* target. - fopenmp-max-parallel-link-jobs, Qopenmp-max-parallel-link-jobs
Determines the maximum number of parallel actions to be performed during device linking steps, where applicable. - fopenmp-target-buffers, Qopenmp-target-buffers
Enables a way to overcome the problem where some OpenMP* offload SPIR-V* devices produce incorrect code when a target object is larger than 4GB. - fopenmp-target-default-sub-group-size, Qopenmp-target-default-sub-group-size
Lets you specify a default sub-group size globally for single program multiple data (SPMD) kernels that are generated for OpenMP* target constructs when offloading to SPIR64-based devices. - fopenmp-target-loopopt, Qopenmp-target-loopopt
Enables the loop optimizer and auto-vectorization for OpenMP* offloading device compilation when option O2 or higher is set or specified. - fopenmp-target-simd, Qopenmp-target-simd
Enables OpenMP* SIMD loop vectorization for OpenMP offloading device compilation when option level O2 or higher is set or specified. - fopenmp-targets, Qopenmp-targets
Enables offloading to a specified GPU target if OpenMP* features have been enabled. - fsycl
Enables a program to be compiled as a SYCL program rather than as plain C++11 program. - fsycl-add-default-spec-consts-image
Enables or disables generation of a copy of every device image that uses a specialization constant, and replaces all instances of that specialization constant with default values defined in the relevant specialization_id variable. - fsycl-add-targets
Lets you add arbitrary device binary images to the fat SYCL* binary when linking. This is a deprecated option that may be removed in a future release. - fsycl-dead-args-optimization
Enables elimination of SYCL dead kernel arguments. - fsycl-device-code-split
Specifies a SYCL* device code module assembly. - fsycl-device-lib
Enables or disables certain device libraries for a SYCL* target. - fsycl-device-obj
Lets you specify the format of device code stored in a resulting object. This is an experimental feature. - fsycl-device-only
Tells the compiler to generate a device-only binary. - fsycl-early-optimizations
Enables LLVM-related optimizations before SPIR-V* generation. - fsycl-enable-function-pointers
Enables function pointers and support for virtual functions for SYCL kernels and device functions. This is an experimental feature. - fsycl-esimd-force-stateless-mem
Determines whether the compiler enforces stateless memory accesses within ESIMD kernels on the target device. This is an experimental feature. - fsycl-explicit-simd
Enables or disables the experimental "Explicit SIMD" SYCL* extension. This is a deprecated option that may be removed in a future release. - fsycl-force-target
Forces the compiler to use the specified target triple device when extracting device code from any given objects on the command line. - fsycl-help
Causes help information to be emitted from the device compiler backend. - fsycl-host-compiler
Tells the compiler to use the specified compiler for the host compilation of the overall offloading compilation that is performed. - fsycl-host-compiler-options
Passes options to the compiler specified by option fsycl-host-compiler. - fsycl-id-queries-fit-in-int
Tells the compiler to assume that SYCL ID queries fit within MAX_INT. - fsycl-instrument-device-code
Enables or disables linking of the Instrumentation and Tracing Technology (ITT) device libraries for VTune™. - fsycl-link
Tells the compiler to perform a partial link of device binaries to be used with Field Programmable Gate Array (FPGA). - fsycl-link-huge-device-code
Tells the compiler to place device code later in the linked binary. This is to prevent 32-bit PC-relative relocations between surrounding Executable and Linkable Format (ELF) sections when the device code is larger than 2GB. This is a deprecated option that will be removed in a future release. - fsycl-link-targets
Tells the compiler to link only device code. This is a deprecated option that may be removed in a future release. - fsycl-max-parallel-link-jobs
Tells the compiler that it can simultaneously spawn up to the specified number of processes to perform actions required to link SYCL applications. This is an experimental feature. - fsycl-optimize-non-user-code
Tells the compiler to optimize SYCL framework utility functions and to leave the kernel code unoptimized for further debugging. - fsycl-pstl-offload
Enables the offloading of C++ standard parallel algorithms to a SYCL device. This is an experimental feature. - fsycl-rdc
Determines whether the compiler generates relocatable device code during SYCL* offload target compilation. - fsycl-remove-unused-external-funcs
Determines whether unused SYCL_EXTERNAL functions are removed during compilation of SYCL device code. - fsycl-targets
Tells the compiler to generate code for specified device targets. - fsycl-unnamed-lambda
Enables unnamed SYCL* lambda kernels. - fsycl-use-bitcode
Tells the compiler to produce device code in LLVM Intermediate Representation (IR) bitcode format into fat objects. - ftarget-compile-fast
Tells the compiler to perform less aggressive optimizations to reduce compilation time at the expense of generating less optimal target code. This is an experimental feature. - ftarget-export-symbols
Exposes exported symbols in a generated target library to allow for visibility to other modules. - ftarget-register-alloc-mode, Qtarget-register-alloc-mode
Specifies a register allocation mode for specific hardware for use by supported target backends. - nolibsycl
Disables linking of the SYCL* runtime library. - qopenmp, Qopenmp
Enables recognition of OpenMP* features, such as parallel, simd, and offloading directives, and tells the parallelizer to generate multi-threaded code based on OpenMP* directives. This is an alternate name for compiler option -fiopenmp (and /Qiopenmp). - qopenmp-link
Controls whether the compiler links to static or dynamic OpenMP* runtime libraries. - qopenmp-simd, Qopenmp-simd
Enables or disables OpenMP* SIMD compilation. - qopenmp-stubs, Qopenmp-stubs
Enables compilation of OpenMP* programs in sequential mode. - reuse-exe
Tells the compiler to speed up Field Programmable Gate Array (FPGA) target compile time by reusing a previously compiled FPGA hardware image. - Wno-sycl-strict
Disables warnings that enforce strict SYCL* language compatibility. - Xopenmp-target
Enables options to be passed to the specified tool in the device compilation tool chain for the OpenMP* target. - Xs
Passes options to the backend tool. - Xsycl-target
Enables options to be passed to the specified tool in the device compilation tool chain for the SYCL* target.