Visible to Intel only — GUID: GUID-14B80668-7BFD-4C43-910B-F4399F4E89C3
Visible to Intel only — GUID: GUID-14B80668-7BFD-4C43-910B-F4399F4E89C3
DPCT1022
Message
There is no exact match between the maxGridSize and the max_nd_range size. Verify the correctness of the code.
Detailed Help
There is no analogue of the maxGridSize in SYCL*. SYCL nd_ranges can have up to three dimensions, just like grids in CUDA*, but there is no maximum of nd_range size beyond the data type width, which is size_t. The Intel® DPC++ Compatibility Tool replaces the maxGridSize with the max_nd_range_size helper, which is initialized to the size_t width.
Suggestions to Fix
Verify the code correctness.
For example, this original CUDA code:
void foo() {
cudaDeviceProp prop;
cudaGetDeviceProperties(&prop, 0);
if (prop.maxGridSize[0] >= TASK_SIZE) {
// submit the task on one kernel
...
} else {
// split the task into multi kernels
...
}
}
results in the following migrated SYCL code:
void foo() {
dpct::device_info prop;
dpct::dev_mgr::instance().get_device(0).get_device_info(prop);
/*
DPCT1022:0: There is no exact match between the maxGridSize and the
max_nd_range size. Verify the correctness of the code.
*/
if (prop.get_max_nd_range_size()[0] >= TASK_SIZE) {
// submit the task on one kernel
...
} else {
// split the task into multi kernels
...
}
}
which is rewritten to:
void foo() {
// submit the task on one kernel
...
}