Cyclone® V GT FPGA
Cyclone® V GT FPGA is the FPGA industry’s low cost and power for 6.144 Gbps transceiver applications.
Cyclone® V GT FPGA
Benefits
Do More with Less Power, Design Time, and Cost
Built on TSMC's 28 nm low-power (28LP) process technology, including an abundance of hard intellectual property (IP) blocks, allowing you to differentiate and do more.
Logic Integration and Differentiation Capabilities
It offers an 8-input adaptive logic module (ALM) and variable-precision digital signal processing (DSP) blocks, allowing up to 13.59 megabits (Mb) of embedded memory.
Increased bandwidth capacity
With hard memory controllers, leverage increased transceiver bandwidth capacity ranging from 614 Mbps to 3.125 Gbps.
Applications
Automotive: Autonomous Driving and In-Vehicle Experience (IVE)
Automotive-grade FPGAs and SoCs can be combined or used separately to enable applications such as gesture recognition, driver monitoring systems and blind spot detection. They also provide flexibility, low latency, high performance-per-watt, functional safety, and security advantages for ADAS/AD applications like sensor ingest and pre-processing and acceleration.
Enhanced for Wireless Applications
Integration of high-speed data links: up to 4.9 Gbps CPRI and 3.072 Gbps OBSAI links, optimized total system cost, and reduces operation costs when operating in thermally constrained environments. High-performance variable-precision DSP blocks for digital predistortion (DPD) and crest-factor reduction (CFR).
Wireless: Wireless Backhaul
Integration simplifies system design: integrated 6G transceivers, integrated PCIe hardware Interoperability platform, and IP suite for common functions. In addition, the 88 mW power per channel, provides cost-effective thermal cooling.
Key Features
Internal memory blocks
- M10K: 10-kilobits (Kb) memory blocks with soft error correction code (ECC).
- Memory logic array block (MLAB): 640-bit distributed LUTRAM where you can use up to 25% of the ALMs as MLAB memory.
General-purpose I/Os
- 875 megabits per second (Mbps) low-voltage differential signaling (LVDS) receiver and 840 Mbps LVDS transmitter.
- 400 MHz/800 Mbps external memory interface.
- On-chip termination (OCT).
- 3.3 V support with up to 16 mA drive strength.
Embedded hard IP blocks
- Embedded internal coefficient memory, and adder/subtractor for improved efficiency.
- Memory controller: DDR3, DDR2, and LPDDR2 with 16 and 32-bit ECC support.
Low-power serial transceivers
Cyclone® V devices deliver the industry’s lowest power 6.144 Gbps transceivers at an estimated 88 mW maximum power consumption per channel.
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