Cyclone® V E FPGA
Cyclone® V E FPGA is optimized for low system cost and power for a wide spectrum of general logic and DSP applications.
Cyclone® V E FPGA
Benefits
Do More with Less Power, Design Time, and Cost
Built on TSMC's 28 nm low-power (28LP) process technology, including an abundance of hard intellectual property (IP) blocks, allowing you to differentiate and do more.
Logic Integration and Differentiation Capabilities
It offers an 8-input adaptive logic module (ALM) and variable-precision digital signal processing (DSP) blocks, allowing up to 13.59 megabits (Mb) of embedded memory.
Lower System Cost
Operating requires only two core voltages and is available in low-cost wire-bond packaging. Includes innovative features such as Configuration via Protocol (CvP) and partial reconfiguration.
Applications
Industrial: Single-Device Motion and Motor Control
Support high-precision control through multiaxis motion control with high performance from hardware acceleration compared to software drivers. Integration of protocols (industrial Ethernet and fieldbus) and control logic increases reliability, minimizes footprint, and lowers cost.
Military Applications
Designed to meet SWaP requirements. Extend battery life, ability to operate in thermally constrained environments, fewer support components and compact packages. Comprehensive security suite including JTAG port protection, 256 bit volatile and non-volatile AES encryption, Error detection circuitry and Unique ID.
Military: Night Vision Goggles
Save power by power down unused hard IP blocks. LPDDR2 support in hard memory controller. Cost saving from DSP blocks for efficient video processing. Fully tested and verified Video and Image Processing (IP) Suite allows you to focus on differentiating features.
Key Features
Internal memory blocks
- M10K: 10-kilobits (Kb) memory blocks with soft error correction code (ECC).
- Memory logic array block (MLAB): 640-bit distributed LUTRAM where you can use up to 25% of the ALMs as MLAB memory.
General-purpose I/Os
- 875 megabits per second (Mbps) low-voltage differential signaling (LVDS) receiver and 840 Mbps LVDS transmitter.
- 400 MHz/800 Mbps external memory interface.
- On-chip termination (OCT).
- 3.3 V support with up to 16 mA drive strength.
Variable precision DSP blocks
Variable-precision DSP: Native support for up to three signal processing precision levels in the same variable-precision DSP block, 64-bit accumulator, and cascade.
Embedded hard IP blocks
- Support up to two hard memory controllers for DDR3, DDR2, and LPDDR2 SDRAM devices.
- Each controller supports 8 to 32 bit components of up to 4 gigabits (Gb) in density with two chip selects and optional ECC.
Additional Resources
Explore more content related to Altera® FPGA devices such as development boards, intellectual property, support and more.
Support Resources
Resource center for training, documentation, downloads, tools and support options.
Development Boards
Get started with our FPGA and accelerate your time-to-market with Altera-validated hardware and designs.
Intellectual Property
Shorten your design cycle with a broad portfolio of Altera-validated IP cores and reference designs.
FPGA Design Software
Explore Quartus Prime Software and our suite of productivity-enhancing tools to help you rapidly complete your hardware and software designs.
Contact Sales
Get in touch with sales for your Altera® FPGA product design and acceleration needs.
Where to Buy
Contact an Altera® Authorized Distributor today.