GTS Transceiver Dual Simplex Interfaces User Guide

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ID 825853
Date 8/16/2024
Public
Document Table of Contents
Document Table of Contents x
1. Introduction 2. Overview 3. Understanding and Planning Dual Simplex Interfaces 4. Implementing Dual Simplex Interfaces 5. Document Revision History for the GTS Transceiver Dual Simplex Interfaces User Guide
4. Implementing Dual Simplex Interfaces x
4.1. Generating the Simplex IP 4.2. Using the Dual Simplex Assignment Editor 4.3. Generating the Dual Simplex IP 4.4. Connecting the Dual Simplex IP 4.5. Verifying the Dual Simplex IP Implementation
1. Introduction
2. Overview
3. Understanding and Planning Dual Simplex Interfaces
4. Implementing Dual Simplex Interfaces
5. Document Revision History for the GTS Transceiver Dual Simplex Interfaces User Guide

4.1. Generating the Simplex IP

You must first create and generate each individual simplex IP separately by following the IP specific user guide.
Note:
  • For SDI, you must create the simplex IP with the Both Base and PHY parameter selected for the SDI_II wrapper option in the GTS SDI II Intel FPGA IP.
  • For HDMI, you must create the simplex IP with the HDMI and Transceiver parameter selected for the HDMI wrapper option in the GTS HDMI Intel FPGA IP.
  • For DisplayPort, you must create the simplex IP using the GTS DisplayPort PHY Altera FPGA IP.
To generate the HDMI simplex IP, follow these steps:
  1. Create the HDMI simplex TX IP and HDMI simplex RX IP by choosing the HDMI and Transceiver parameter and other relevant parameters for your design using the GTS HDMI Intel FPGA IP.
    Figure 6. HDMI Simplex TX and RX IPs
  2. Generate the IP files for the HDMI simplex IPs by clicking IP Generation step in the Compilation Dashboard of Quartus® Prime Pro Edition software as shown in the following figure.
    Figure 7. IP Generation
    Once the IP generation completes successfully, the IP Generation step turns green with a check mark next to it as shown in the following figure.
    Figure 8. Successful IP Generation
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