GTS Transceiver PHY User Guide

ID 817660
Date 7/08/2024
Public
Document Table of Contents

2.3.2.1. Receiver Buffer and Equalizer

The receiver analog front end is shown in the following figure.
Figure 17. Simplified Receiver Analog Front End
The various capacitors and resistors for the receiver analog front end are described below:
  1. You can implement on board AC coupling capacitors, Con-board, based on applicable standards.
  2. Con-chip, on-chip AC coupling capacitor is 1pF. It is always on and is only bypassed in SDI mode.
  3. RDIFF-DC, DC differential receive impedance is programmable to 85Ω or 100Ω.
  4. When you implement on-board AC coupling capacitors you must set VRX-CM-DC to ground termination. When it is DC coupled and no on-board AC coupling capacitors are implemented, VRX-CM-DC, receiver input DC common-mode voltage (non-SDI mode) at the bumps must be:
    1. Smaller than 700mV, if squelch detect is not used.
    2. Must be between 200mV to 300mV, if squelch detect is used.
    Vcm is set to 700mV automatically if you use SDI mode.
Note: Refer to Configurable Quartus® Prime Settings or Analog Parameter Options for details about how to set the RX termination mode.
The receiver buffer receives serial data from input pins and feeds it to the CDR block and deserializer. To optimize the bit error rate (BER) for optimum performance, receiver equalization supports adaptive and manual tuning.