GTS Transceiver PHY User Guide: Agilex™ 5 FPGAs and SoCs

ID 817660
Date 4/07/2025
Public

Visible to Intel only — GUID: vxs1708650860321

Ixiasoft

Document Table of Contents

3.14.2.2. GTS Attribute Access Method Example 2

The following examples demonstrate the steps to perform polarity inversion for the GTS PMA physical lane 0 of a quad.

To reverse the polarity of TX p and n pins:

  1. Assert TX reset.
  2. Write 0x1A065 to address 0xA403C.
  3. Poll address 0xA4040 until bit 14 = 0 and bit 15 = 1.
  4. Write 0x12065 to address 0xA403C.
  5. Poll address 0xA4040 until bit 14 = 0 and bit 15 = 0.
  6. Deassert TX reset.

To reverse the polarity of RX p and n pins:

  1. Assert RX reset.
  2. Write 0x1A066 to address 0xA403C.
  3. Poll address 0xA4040 until bit 14 = 0 and bit 15 = 1.
  4. Write 0x12066 to address 0xA403C.
  5. Poll address 0xA4040 until bit 14 = 0 and bit 15 = 0.
  6. Deassert RX reset.

To revert back the polarity of TX p and n pins:

  1. Assert TX reset.
  2. Write 0x0A065 to address 0xA403C.
  3. Poll address 0xA4040 until bit 14 = 0 and bit 15 = 1.
  4. Write 0x02065 to address 0xA403C.
  5. Poll address 0xA4040 until bit 14 = 0 and bit 15 = 0.
  6. Deassert TX reset.

To revert back the polarity of RX p and n pins:

  1. Assert RX reset.
  2. Write 0x0A066 to address 0xA403C.
  3. Poll address 0xA4040 until bit 14 = 0 and bit 15 = 1.
  4. Write 0x02066 to address 0xA403C.
  5. Poll address 0xA4040 until bit 14 = 0 and bit 15 = 0.
  6. Deassert RX reset.