General-Purpose I/O User Guide: Agilex™ 5 FPGAs and SoCs

ID 813934
Date 4/05/2024
Public
Document Table of Contents

2.4.2. True Differential Signaling I/O Termination in Agilex™ 5 Devices

All HSIO banks have dedicated circuitry to support true differential I/O standards by using the True Differential Signaling, DPHY, or SLVS-400 differential buffers without resistor networks.

The True Differential Signaling buffer is compatible with the LVDS, RSDS, Mini-LVDS, and LVPECL standards. The True Differential Signaling, DPHY, and SLVS-400 buffers support 100 Ω differential on-chip termination (RD OCT). If you use an SLVS-400 or DPHY receiver:

  • The RD OCT is calibrated and always enabled.
  • You must connect a 240 Ω RZQ resistor
Figure 16. True Differential Signaling I/O Standard Termination


Figure 17. SLVS-400 and DPHY I/O Standards Termination


Use OCT with these I/O standards to save board space and cost. OCT reduces the number of external termination resistors usage.