General-Purpose I/O User Guide: Agilex™ 5 FPGAs and SoCs

ID 813934
Date 4/05/2024
Public
Document Table of Contents

2.5.18. Connection to True Differential Signaling Input Buffers During Device Reconfiguration

You can reconfigure Agilex™ 5 FPGAs at any time during user mode. Follow these guidelines for connection from an external device driving the True Differential Signaling input buffer during reconfiguration of Agilex™ 5 FPGAs.
Table 24.  True Differential Signaling Input Buffer Reconfiguration Guidelines
True Differential Signaling Input Buffer Mode After Reconfiguration External Connection Guidelines
Same mode as before FPGA reconfiguration The external device can continue to drive the True Differential Signaling input buffer during reconfiguration of the FPGA.
Different mode after FPGA reconfiguration
  • Before you start reconfiguration of the FPGA, ensure that the external device tri-states the connection.
  • The external device can initiate a new connection to the True Differential Signaling input buffer after successful reconfiguration of the FPGA.