AN 1002: Sharing Platform Designer Packaged Subsystems

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ID 786899
Date 10/02/2023
Public
Document Table of Contents
Document Table of Contents x
1. Answers to Top FAQs 2. About This Application Note 3. Packaged Subsystems Overview 4. Packaged Subsystem Author Flow 5. Packaged Subsystem User Flow 6. Document Revision History of AN 1002: Sharing Platform Designer Packaged Subsystems
2. About This Application Note x
2.1. Document Prerequisites
3. Packaged Subsystems Overview x
3.1. User Personas for Packaged Subsystems 3.2. Terminology for Packaged Subsystems
4. Packaged Subsystem Author Flow x
4.1. Step 1: Create a Project and Platform Designer System 4.2. Step 2: Add Components to the System 4.3. Step 3: Connect Components in the System 4.4. Step 4: Create and Configure a Packaged Subsystem 4.5. Step 5: Revise a Packaged Subsystem
4.4. Step 4: Create and Configure a Packaged Subsystem x
4.4.1. Editing the Packaged Subsystem 4.4.2. Step 4a: Add Two Checkbox Controls 4.4.3. Step 4b: Enable or Disable Modules and Checkboxes 4.4.4. Step 4c: Run run_system_script 4.4.5. Step 4d: Iterate Over All Parameters 4.4.6. Step 4e: Setting DisplayPort IP Functionality 4.4.7. Step 4f: Make Packaged Subsystem Unlockable 4.4.8. Step 4g: Sync System Infos, Assign Base Addresses, and Save
5. Packaged Subsystem User Flow x
5.1. Step 1: Create the User Project and System 5.2. Step 2: Add Components to the User System 5.3. Step 3: Instantiate the Packaged Subsystem 5.4. Step 4: Unlock the Packaged Subsystem 5.5. Step 5: Integrate the Top Hierarchy of the System 5.6. Step 6: Generate HDL and Run Synthesis
1. Answers to Top FAQs
2. About This Application Note
3. Packaged Subsystems Overview
4. Packaged Subsystem Author Flow
5. Packaged Subsystem User Flow
6. Document Revision History of AN 1002: Sharing Platform Designer Packaged Subsystems

4.1. Step 1: Create a Project and Platform Designer System

To create a new Intel® Quartus® Prime project and Platform Designer system in which to define the packaged subsystem, follow these steps:

  1. In the Intel® Quartus® Prime software, click File > New Project Wizard to create a new project. For this example, specify subsystem_author as the project name, my_system as the top level module, and the Intel Agilex® 7 FPGA (AGIB027R31B1E1VAA) as the target device.
    Figure 3. New Project Wizard Initial Settings


  2. After specifying New Project Wizard settings, click the Finish button. The new project opens in the Intel® Quartus® Prime software.
  3. Click the Create New Platform Designer System button on the main toolbar. The Open System dialog box appears.
    Figure 4. Platform Designer Button on Intel® Quartus® Prime Toolbar


  4. In the Open System dialog box, click the Create new Platform Designer system button. The New Platform Designer System dialog box appears.
    Figure 5. Create new Platform Designer System Button in Open System Dialog Box


  5. In the New Platform Designer System dialog box, specify my_system for the File Name, and then click the Create button.
  6. In the Open System dialog box, click the Create button. The new system with default clock and reset components appears in the System View tab.
    Figure 6. System View Tab with Default Components


  7. In the System View tab, right-click the default clock_in and reset_in components, and then click Remove. Confirm your selection when prompted.
    Figure 7. System View Tab Default Components Removed


    You next add new components to the empty system.

Level Two Title