Intel® Simics® Simulator for Intel® FPGAs: User Guide

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ID 784383
Date 11/16/2024
Public
Document Table of Contents
Document Table of Contents x
1. About This Document 2. Intel® Simics® Simulator and Virtual Platforms 3. Intel® Simics® Simulator for Intel® FPGAs Device Portfolio 4. Installing the Intel® Simics® Simulator for Intel® FPGAs 5. Getting Started with Intel® Simics® Simulator 6. Debugging Target Software 7. Networking with the Simulated Target System 8. Intel® Simics® Scripting 9. Software Debug Examples with Intel® Simics® Simulator 10. Document Revision History for Intel® Simics® Simulator for Intel FPGAs User Guide A. Intel® Simics® Simulator Command Reference
1. About This Document x
1.1. Documentation Conventions for Examples 1.2. Terminology 1.3. List of Acronyms
2. Intel® Simics® Simulator and Virtual Platforms x
2.1. Device Model and Virtual Platforms 2.2. Intel® Simics® Simulator 2.3. Intel® Simics® Simulator Architecture
2.2. Intel® Simics® Simulator x
2.2.1. Intel® Simics® Simulator for Intel FPGAs Capabilities
4. Installing the Intel® Simics® Simulator for Intel® FPGAs x
4.1. Installing the Intel® Simics® Simulator for Intel® FPGAs on Linux* Systems 4.2. Installing the Intel® Simics® Simulator for Intel® FPGAs on Microsoft Windows* Systems 4.3. Installing Ashling* RiscFree* IDE for Intel® FPGAs 4.4. Intel® Simics® Simulator for Intel® FPGAs Support
5. Getting Started with Intel® Simics® Simulator x
5.1. Simulation Set Up 5.2. Starting the Simulation 5.3. Intel® Simics® Simulator Command-Line Interface (CLI) 5.4. Hardware Inspection 5.5. Intel® Simics® Simulator Timing
5.1. Simulation Set Up x
5.1.1. Initializing an Intel® Simics® Project and Deploying a Virtual Platform 5.1.2. Understanding Target Scripts
5.2. Starting the Simulation x
5.2.1. Starting a Simulation from a Command Prompt 5.2.2. Starting a Simulation with Ashling* RiscFree* IDE
5.3. Intel® Simics® Simulator Command-Line Interface (CLI) x
5.3.1. Version of the Intel® Simics® Simulator for Intel FPGAs Software 5.3.2. Simulation Run Control from CLI 5.3.3. Intel® Simics® Simulator Command Scope 5.3.4. Intel® Simics® Simulator CLI Variables and Operations 5.3.5. Intel® Simics® Simulator CLI Command Completion and Command History 5.3.6. Intel® Simics® Command-Line Interface Help 5.3.7. Capture of CLI Session to a File 5.3.8. Intel® Simics® Simulator File Location and Intel® Simics® Search Path
5.4. Hardware Inspection x
5.4.1. Listing Objects in the Target System 5.4.2. Processor (CPU) Inspection 5.4.3. Device Inspection 5.4.4. Memory Mapping and Memory Inspection 5.4.5. Logging
5.4.2. Processor (CPU) Inspection x
5.4.2.1. Listing Processors 5.4.2.2. Inspect Processor Registers
5.4.3. Device Inspection x
5.4.3.1. Retrieve List of Devices 5.4.3.2. Inspecting Device Registers
5.4.4. Memory Mapping and Memory Inspection x
5.4.4.1. Memory Mapping Inspection 5.4.4.2. Memory Inspection
5.4.5. Logging x
5.4.5.1. Breakpoints on CLI Log Messages
5.5. Intel® Simics® Simulator Timing x
5.5.1. CPU Frequency 5.5.2. CPU Cycles and Steps 5.5.3. Events 5.5.4. Enable Real Time
6. Debugging Target Software x
6.1. Intel® Simics® Debugger and Debug Context 6.2. Capturing Serial Console Output 6.3. Breakpoints 6.4. Debugging Target Software with Symbol Files 6.5. Debugging Target Software with Ashling* RiscFree* Debugger 6.6. Capturing CPU Instruction Execution Trace
6.3. Breakpoints x
6.3.1. Memory Breakpoints 6.3.2. Temporal Breakpoints 6.3.3. CPU Control Register Breakpoints 6.3.4. Hardware Access Breakpoints 6.3.5. CPU Register Breakpoints 6.3.6. Tracing Breakpoints 6.3.7. Text Console Activity Breakpoints
6.4. Debugging Target Software with Symbol Files x
6.4.1. Loading Symbol Files in a Simulation
6.5. Debugging Target Software with Ashling* RiscFree* Debugger x
6.5.1. Remote Debugging with RiscFree* IDE
6.5.1. Remote Debugging with RiscFree* IDE x
6.5.1.1. Remote Debugging With Intel® Simics® Simulation and RiscFree* IDE on the Same System 6.5.1.2. Remote Debugging With Intel® Simics® Simulation and RiscFree* IDE on Different Systems 6.5.1.3. Remote Access to the Target System Serial Console
7. Networking with the Simulated Target System x
7.1. Network Simulation and Service Node 7.2. Connectivity Between Host PC and Target System
7.2. Connectivity Between Host PC and Target System x
7.2.1. Port Forwarding 7.2.2. Transferring Files Between Host PC and Target System 7.2.3. Accessing Target System from Host PC Through HTTP 7.2.4. Networking Commands Reference Table
7.2.1. Port Forwarding x
7.2.1.1. Incoming Port Forwarding 7.2.1.2. Outgoing Port Forwarding
7.2.1.1. Incoming Port Forwarding x
7.2.1.1.1. Example of an SSH Connection with Incoming Port Forwarding
7.2.1.2. Outgoing Port Forwarding x
7.2.1.2.1. Example of SSH Connection With Outgoing Port Forwarding 7.2.1.2.2. Example of SSH Connection via NAPT
7.2.2. Transferring Files Between Host PC and Target System x
7.2.2.1. Transferring Files with SCP service 7.2.2.2. Transferring Files with TFTP service
7.2.2.1. Transferring Files with SCP service x
7.2.2.1.1. Transferring Files With SCP Service via Forwarding Ports 7.2.2.1.2. Transferring Files with SCP from Target System to Host PC via NAPT
7.2.2.2. Transferring Files with TFTP service x
7.2.2.2.1. TFTP Using Forwarding Port 7.2.2.2.2. TFTP via NAPT 7.2.2.2.3. TFTP Using TFTP Server in Intel® Simics® Service Node
8. Intel® Simics® Scripting x
8.1. Scripts in CLI
8.1. Scripts in CLI x
8.1.1. Variables 8.1.2. Command Return Values 8.1.3. Control Flow Commands 8.1.4. Local Variables 8.1.5. Integer Conversion 8.1.6. Accessing Configuration Parameters 8.1.7. Error Handling in Scripts 8.1.8. Script Branches
8.1.8. Script Branches x
8.1.8.1. Script Branches Commands 8.1.8.2. Variables in Script Branches 8.1.8.3. Branch Synchronization 8.1.8.4. Canceling Script Branches 8.1.8.5. Script Branches Restrictions
9. Software Debug Examples with Intel® Simics® Simulator x
9.1. Debugging Linux* User-Mode Application
9.1. Debugging Linux* User-Mode Application x
9.1.1. Debugging a Linux Application with GDB 9.1.2. Debugging a Linux Application with RiscFree* IDE
9.1.1. Debugging a Linux Application with GDB x
9.1.1.1. Debugging with GDB Debug from Host PC Using Forwarding Ports 9.1.1.2. Debugging with GDB from Host PC with Intel® Simics® Simulator GDB Server
1. About This Document
2. Intel® Simics® Simulator and Virtual Platforms
3. Intel® Simics® Simulator for Intel® FPGAs Device Portfolio
4. Installing the Intel® Simics® Simulator for Intel® FPGAs
5. Getting Started with Intel® Simics® Simulator
6. Debugging Target Software
7. Networking with the Simulated Target System
8. Intel® Simics® Scripting
9. Software Debug Examples with Intel® Simics® Simulator
10. Document Revision History for Intel® Simics® Simulator for Intel FPGAs User Guide
A. Intel® Simics® Simulator Command Reference

5.4.4.1. Memory Mapping Inspection

A memory space is a fundamental abstraction in the Intel® Simics® simulator providing support for generic 64-bit address spaces into which memory and devices can be mapped. More concretely, a memory space takes a stream of transactions to an address space and distributes them to devices mapped into the address space in a highly efficient manner while optionally providing address translations, byte swapping, and breakpoint support. Memory space objects can be cascaded to form arbitrarily complex mappings and support dynamic reconfiguration and remapping at run time through attributes to support the modeling of buses with dynamic addressing.

In the previous section, the use of devs command was described. As part of the output of this command, the memory space to which each device belongs is presented in the space column in the table.

Similarly, you can determine the devices that are mapping into a memory space. This can be done using the following commands: 

 <memory_space>.map
<memory_space>.memory-map
The output for each one of these commands slightly differs. The memory mapping is shown as follows: 
# Intel Simics simulator CLI

simics> system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.map
---------------------------------------------------------------------------------
Base          Object                Fn  Offset  Length  Target  Prio Align Swap
---------------------------------------------------------------------------------
0x0         agilex_hps.ocram             0x0    0x80000           0   
0x10808000  ..sdmmc.bank.sdmmc_bank      0x0    0x1000            0
0x10810000  ..tsn0.bank.csr              0x0    0x4000            0
:
---------------------------------------------------------------------------------
Besides the two commands presented above, there are some other commands that can be executed from a memory space. These commands allow to add or remove a mapping, read and write from/to a memory location under the memory space among many other options: 
# Intel Simics simulator CLI
simics> system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.  <double tab>
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.add-map
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.bp-break-memory
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.bp-run-until-memory
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.bp-trace-memory
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.bp-wait-for-memory
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.debug
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.del-map
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.examine-memory
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.get
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.get-string
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.info
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.load-binary
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.load-file
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.load-intel-hex
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.load-intel-obj
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.load-vmem
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.log-group
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.log-level
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.map
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.memory-map
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.read
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.read-string
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.save-file
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.save-intel-32-obj
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.save-intel-hex
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.save-intel-obj
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.save-vmem
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.set
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.set-string
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.status
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.wait-for-get
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.wait-for-read
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.wait-for-set
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.wait-for-write
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.write
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.write-string
system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.x

Another helpful command is the memory-map. This displays the physical memory map including translator for the current selected processor (information from another processor can be shown using the object command parameter). 

# Intel Simics simulator CLI

simics> memory-map system.board.fpga.soc_inst.hps_subsys.agilex_hps.cpu_mem[0]
---------------------------------------------------------
Start       End            Object                 Offset
---------------------------------------------------------
0x00000   0x00fff   system…agilex_hps.ocram            
0x01000   0x01fff   system…agilex_hps.ocram       0x1000
0x02000   0x02fff   system…agilex_hps.ocram       0x2000
0x03000   0x03fff   system…agilex_hps.ocram       0x3000
:
---------------------------------------------------------

You can use the probe-adddress command to determine if there is a device associated with a specific address (i.e., if a device is mapped at that address) and if that device has any register mapped at that location. The following example shows this command identifying what is mapped at address 0x10D11000. In this example, this address corresponds to the stat register in the Reset Manager and can be seen in the following captured output: 

# Intel Simics simulator CLI
simics> probe-address 0x10D11000

Translating virtual address to physical: 0x10d11000 -> p:0x8000000010d11000
------------------------------------------------------------------                             
Target                                Offset                Notes
------------------------------------------------------------------
system..agilex_hps.cpu_mem[0]        0x8000000010d11000    
system...agilex_hps.bt               0x8000000010d11000       +
system...agilex_hps.phys_mem         0x0000000010d11000    
system...agilex_hps.rstmgr.bank.regs 0x0000000000000000 
------------------------------------------------------------------
'+' - Translator implementing 'translate' interface
Destination: system.board.fpga.soc_inst.hps_subsys.agilex_hps.rstmgr.bank.regs offset 0x0
Register:    STAT @ 0x0 (4 bytes) + 0
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