High Bandwidth Memory (HBM2E) Interface Agilex™ 7 M-Series FPGA IP User Guide

ID 773264
Date 4/29/2024
Public
Document Table of Contents

4. Creating and Parameterizing the High Bandwidth Memory (HBM2E) Interface FPGA IP

This chapter contains information on project creation, IP parameter descriptions, and pin planning for your High Bandwidth Memory (HBM2E) Interface FPGA IP.