External Memory Interfaces Agilex™ 7 M-Series FPGA IP Core Release Notes

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ID 772635
Date 11/18/2024
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1. External Memory Interfaces Intel Agilex® 7 M-Series FPGA IP Release Notes
1. External Memory Interfaces Intel Agilex® 7 M-Series FPGA IP Release Notes x
1.1. External Memory Interfaces Agilex™ 7 M-Series FPGA IP v1.0.0 1.2. External Memory Interfaces Agilex™ 7 M-Series FPGA IP v6.2.0 1.3. External Memory Interfaces Agilex™ 7 M-Series FPGA IP v6.1.0 1.4. External Memory Interfaces Agilex™ 7 M-Series FPGA IP v6.0.0 1.5. External Memory Interfaces Intel Agilex® 7 M-Series FPGA IP v5.0.0 1.6. External Memory Interfaces Intel Agilex® 7 M-Series FPGA IP v4.0.0 1.7. External Memory Interfaces Intel Agilex® 7 M-Series FPGA IP v3.0.0
1. External Memory Interfaces Intel Agilex® 7 M-Series FPGA IP Release Notes

1.3. External Memory Interfaces Agilex™ 7 M-Series FPGA IP v6.1.0

Table 11.  v6.1.0 2024.04.01
Description Impact
Verified in the Quartus® Prime software v24.1. Provides external memory interface IP for DDR4, DDR5, and LPDDR5 external memory for Agilex™ 7 M-Series devices.
Added support for the Performance Monitor (PMON) FPGA IP. Provides a synthesizable IP for measuring performance on an interface.
Added support for the Test Engine FPGA IP. Provides a software-driven programmable AXI traffic generator.

Known Issues in this Version

For a list of known issues affecting this release of the External Memory Interfaces Agilex™ 7 M-Series FPGA IP, follow this link to the: FPGA Knowledge Base.

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