Intel® FPGA AI Suite: SoC Design Example User Guide

ID 768979
Date 12/01/2023
Public

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3.6.3. Compiling the Graphs

The precompiled SD card image (.wic) provided with the Intel® FPGA AI Suite uses A10_Performance.arch as the IP architecture configuration.

To create the AOT file for the M2M variant (which uses the dla_benchmark utility), run the following command:
cd $COREDLA_WORK/demo/models/public/resnet-50-tf/FP32
dla_compiler \
--march $COREDLA_ROOT/example_architectures/A10_Performance.arch \
--network-file ./resnet-50-tf.xml \
--foutput-format=open_vino_hetero \
--o $COREDLA_WORK/demo/RN50_Performance_b1.bin \
--batch-size=1 \
--fanalyze-performance
To create the AOT file for the S2M variant (which uses the streaming inference app), run the following command:
cd $COREDLA_WORK/demo/models/public/resnet-50-tf/FP32
dla_compiler \
--march $COREDLA_ROOT/example_architectures/A10_Performance.arch \
--network-file ./resnet-50-tf.xml \
--foutput-format=open_vino_hetero \
--o $COREDLA_WORK/demo/RN50_Performance_no_folding.bin \
--batch-size=1 \
--fanalyze-performance \
--ffolding-option=0

After running either these commands, the compiled models and demonstration files are in the following locations:

Compiled Models

$COREDLA_WORK/demo/RN50_Performance_b1.bin

$COREDLA_WORK/demo/RN50_Performance_no_folding.bin

Sample Images

$COREDLA_WORK/demo/sample_images/

Architecture File

$COREDLA_ROOT/example_architectures/A10_Performance.arch