Intel® FPGA AI Suite: PCIe-based Design Example User Guide
A newer version of this document is available. Customers should click here to go to the newest version.
Visible to Intel only — GUID: taa1661605293373
Ixiasoft
Visible to Intel only — GUID: taa1661605293373
Ixiasoft
5.3. Compiling the PCIe* -based Example Design
To build example design bitstreams, you must have a license that permits bitstream generation for the IP, and have the correct version of Quartus installed. Use the dla_build_example_design.py utility to create a bitstream.
For more details about this command, the steps it performs, and advanced command options, refer to Build Script and to the Intel FPGA AI Suite Getting Started Guide.