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1. About the RiscFree* IDE
2. Installation and Setup
3. Getting Started with RiscFree* IDE
4. Debug Setup for Nios® V Processor System
5. Debug Setup for Arm* Hard Processor System
6. Debugging with RiscFree* IDE
7. Debugging with Command-Line Interface
8. Ashling RiscFree* Integrated Development Environment (IDE) for Intel® FPGAs User Guide Archives
9. Document Revision History for the Ashling RiscFree* Integrated Development Environment (IDE) for Intel® FPGAs User Guide
A. Appendix
6.1. Debug Features in RiscFree* IDE
6.2. Processor System Debug
6.3. Heterogeneous Multicore Debug
6.4. Debugging µC/OS-II Application
6.5. Debugging FreeRTOS Application
6.6. Debugging Zephyr Application
6.7. Arm* HPS On-Chip Trace
6.8. Debugging the Arm* Linux Kernel
6.9. Debugging Target Software in an Intel® Simics Simulator Session
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5.2. Importing Arm* HPS Project
To import the Intel Agilex® 7 Arm* Cortex* -A53 sample project and a pre-built .elf file, follow these steps:
Note: Arm* toolchain is not included by default. Follow the steps in the Toolchain for Arm Processor section to modify toolchain configuration to include Arm* GNU GCC toolchain.
- To open the Import wizard, click File > Import. In the Import wizard, select Ashling Sample Projects > C/C++ Sample Projects and click Next.
- In the Import Sample Project Wizard, select examples > agilex > cortex-a53-sum and click Finish. The project is listed in the Project Explorer.
Figure 9. Importing Cortex* -A53 Sample Project to RiscFree* IDE
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