F-Tile JESD204B Intel® FPGA IP Design Example User Guide

ID 729497
Date 12/02/2024
Public
Document Table of Contents

2. F-Tile JESD204B Intel® FPGA IP Design Example Quick Start Guide

The F-Tile JESD204B Intel® FPGA IP design examples for Intel Agilex® 7 devices feature a simulating testbench.

You can generate the F-Tile JESD204B design examples through the IP catalog in the Quartus® Prime Pro Edition software.

Figure 1. Development Stages for the Design Example