Nios® V Embedded Processor Design Handbook

ID 726952
Date 7/08/2024
Public
Document Table of Contents

7.3.1. Individual Factory, Application, and Update Images

The example requires four images to demonstrate the RSU feature. You can modify a Nios® V processor project and create four different systems with distinctive functions. However, you need to perform multiple compilation to achieve that.

To simplify the build flow, this example implements two processor systems (factory and application system) and makes three copies of the latter .SOF file and named them respectively as below:

  • factory.sof (Factory Image .SOF)
  • application-0.sof (App Image .SOF)
  • application-1.sof (App Update Image .SOF)
  • application-2.sof (Factory Update Image .SOF)
Even if the application images contain the same bitstreams, you can identify the images using the RSU status log.
Table 45.   Nios® V Processor System Details
System Factory Application
Platform Designer System To create a Platform Designer system, follow the steps in section Hardware Design Flow with OCRAM size of 6 Mbytes. To create a Platform Designer system, follow the steps in section Hardware Design Flow with OCRAM size of 1 Mbytes.
Board Support Package Apply the BSP settings using the steps in section Software Design Flow.
Nios® V Processor Source Code Uses factory.c that features basic RSU operations from Example source code for Nios V Processor LibRSU application. Refer to the link in Related Information. Uses application.c that features a simplified RSU operations from Example source code for Nios V Processor LibRSU application. Refer to the link in Related Information.
Processor Boot Method

Software boots from OCRAM.

Image
  • Factory Image .SOF
  • App Image .SOF
  • App Update Image .SOF
  • Factory Update Image .SOF