Nios® V Embedded Processor Design Handbook

ID 726952
Date 7/08/2024
Public
Document Table of Contents

8.2.6.3. Device Programming

To program Nios® V processor based system into the FPGA and to run your application, use Quartus® Prime Programmer tool.
  1. To create the Nios® V processor inside the FPGA device, program the .sof file onto the board with the following command.
    Table 49.  Command
    Operating System Command
    Windows*
    quartus_pgm -c 1 -m JTAG -o p;<SOF File>@1
    Linux*
    quartus_pgm -c 1 -m JTAG -o p\;<SOF File>@1
    Note:
    • -c 1 is referring to cable number connected to the Host Computer.
    • @1 is referring to device index on the JTAG Chain and may differ for your board.
  2. Download the .elf using the niosv-download command.
    niosv-download -g <elf file> 
  3. Use the JTAG UART terminal to print the stdout and stderr of the Nios® V processor system.
    juart-terminal