F-Tile Dynamic Reconfiguration Design Example User Guide

ID 710582
Date 10/06/2023
Public

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Document Table of Contents

1.2.4. Ethernet to CPRI Design Example Parameters

Figure 6. Ethernet to CPRI Example Design Tab
Table 5.  Ethernet to CPRI Design Example Parameters
Parameters Value Description
Select Protocol/mode

Ethernet to CPRI

Select the IP protocol for dynamic reconfiguration.
Select Base Variant

25G-1

25G-1 (with 1GE)
Select the configuration of base variant for dynamic reconfiguration.
Example Design Files Simulation

Synthesis

Simulation option generates the testbench and compilation-only project. Synthesis option generates the hardware design example.
Generated File Format Verilog

VHDL

Select the HDL files format. If you select VHDL, you must simulate the testbench with a mixed-language simulator.
Target Development Kit None

Intel Agilex® 7 I-Series Transceiver-SoC Development Kit DK-SI-AGI027FA

Intel Agilex® 7 I-Series Transceiver-SoC Development Kit DK-SI-AGI027FB

Target development kit option specifies the target development kit used to generate the project.