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Ixiasoft
1.3.6.1. Running Incremental Flow with Signal Probe
You can route the internal signal to pins and remove the reserve pins to probe the signal with Signal Probe.
You can add assignments to route the internal signal to pins; for example:
set_global_assignment -name CREATE_SIGNALPROBE_PIN test_pin1
set_instance_assignment -name CONNECT_SIGNALPROBE_PIN test_pin1 -to addressr_reg
Recompile the design with the command: quartus_sh –flow recompile <design>
You can check the connection in the compilation report, or in the Fitter report, <design_name>.fit.rpt.
Figure 23. Connections to Signal Probe Pins in Compilation Report
Figure 24. Connections to Signal Probe Pins in Fitter Report