Intel Agilex® 7 General-Purpose I/O User Guide: F-Series and I-Series

ID 683780
Date 10/31/2023
Public

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2.6.2. HSPICE* Models

You can use the F-Series and I-Series SPICE model to perform system-level simulations for various configurations. The SPICE kits provide models that support a wide variety of I/O features across process, voltage, and temperature (PVT)

Each SPICE kit contains the following items:

  • Encrypted transistor and logic cell library models
  • Encrypted input or output buffer circuit models for single-ended and differential I/Os
  • Single-ended and differential sample SPICE decks
  • User guide that describes the model usage

The HSPICE* models provide options to simulate buffer behavior for the following I/O features:

  • RS OCT with and without calibration
  • RT OCT with calibration
  • Internal weak pull-up
  • Open drain
  • Bus-hold