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Ixiasoft
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Ixiasoft
1.2. I/O Model Selection: IBIS or HSPICE
IBIS models define the behavior of input or output buffers through voltage-current (V-I) and voltage-time (V-t) data tables. HSPICE models, or decks, include complete physical descriptions of the transistors and parasitic capacitances that make up an I/O buffer along with all the parameter settings that you require to run a simulation.
The Quartus® Prime software generates HSPICE decks, and adds preconfigured I/O standard, voltage, and pin loading settings for each pin in your design.
The choice of I/O model type is based on many factors.
Feature | IBIS Model | HSPICE Model |
---|---|---|
I/O Buffer Description | Behavioral—I/O buffers are described by voltage-current and voltage-time tables in typical, minimum, and maximum supply voltage cases. | Physical—I/O buffers and all components in a circuit are described by their physical properties, such as transistor characteristics and parasitic capacitances, as well as their connections to one another. |
Model Customization | Simple and limited—The model completely describes the I/O buffer and does not usually have to be customized. | Fully customizable—Unless connected to an arbitrary board description, the description of the board trace model must be customized in the model file. All parameters of the simulation are also adjustable. |
Simulation Set Up and Run Time | Fast—Simulations run quickly after set up correctly. | Slow—Simulations take time to set up and take longer to run and complete. |
Simulation Accuracy | Good—For most simulations, accuracy is sufficient to make useful adjustments to the FPGA or board design to improve signal integrity. | Excellent—Simulations are highly accurate, making HSPICE simulation almost a requirement for any high-speed design where signal integrity and timing margins are tight. |
Third-Party Tool Support | Excellent—Almost all third-party board simulation tools support IBIS. | Good—Most third-party tools that support SPICE support HSPICE. However, Synopsys* HSPICE is required for simulations of Intel’s encrypted HSPICE models. |