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2.1. Installing and Licensing Intel® FPGA IP Cores
2.2. IP Catalog and Parameter Editor
2.3. Specifying the IP Core Parameters and Options
2.4. Simulating Intel® FPGA IP Cores
2.5. Simulating the IP with the RTL Simulator
2.6. Simulating the Turbo IP with the C-Model
2.7. Simulating the Turbo IP with MATLAB
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1.5. Release Information
Intel® FPGA IP versions match the Quartus® Prime Design Suite software versions until v19.1. Starting in Quartus® Prime Design Suite software version 19.2, Intel® FPGA IP has a new versioning scheme.
The Intel® FPGA IP version (X.Y.Z) number can change with each Quartus® Prime software version. A change in:
- X indicates a major revision of the IP. If you update the Quartus® Prime software, you must regenerate the IP.
- Y indicates the IP includes new features. Regenerate your IP to include these new features.
- Z indicates the IP includes minor changes. Regenerate your IP to include these changes.
Item | Description |
---|---|
IP Version | 22.3.3 |
Release Date | August 2023 |
Ordering Code | IP-TURBO (IPR-TURBO) |