Visible to Intel only — GUID: beu1583885253128
Ixiasoft
4.3.8.1. eCPRI Message Type 0- IQ Data Transfer
4.3.8.2. eCPRI Message Type 1- Bit Sequence Transfer
4.3.8.3. eCPRI Message Type 2- Real Time Control Data
4.3.8.4. eCPRI Message Type 3- Generic Data Transfer
4.3.8.5. eCPRI Message Type 4- Remote Memory Access
4.3.8.6. eCPRI Message Type 5- One-Way Delay Measurement
4.3.8.7. eCPRI Message Type 6- Remote Reset
4.3.8.8. eCPRI Message Type 7- Event Indication
4.3.8.9. eCPRI Message Type 64- 255 Vendor Specific
5.1. Clock Signals
5.2. Power, Reset, and Firewalls Signals
5.3. TX Time of Day Interface
5.4. RX Time of Day Interface
5.5. Interrupt
5.6. Configuration Avalon® Memory-Mapped Interface
5.7. Ethernet MAC Source Interface
5.8. Ethernet MAC Sink Interface
5.9. External ST Source Interface
5.10. External ST Sink Interface
5.11. eCPRI IP Source Interface
5.12. eCPRI IP Sink Interface
5.13. Miscellaneous Interface Signals
5.14. IWF Type 0 eCPRI Interface
5.15. IWF Type 0 CPRI MAC Interface
5.15.1. CPRI 32-bit IQ Data TX Interface
5.15.2. CPRI 64-bit IQ Data TX Interface
5.15.3. CPRI 32-bit Ctrl_AxC TX Interface
5.15.4. CPRI 64-bit Ctrl_AxC TX Interface
5.15.5. CPRI 32-bit Vendor Specific TX Interface
5.15.6. CPRI 64-bit Vendor Specific TX Interface
5.15.7. CPRI 32-bit Real-time Vendor Specific TX Interface
5.15.8. CPRI 64-bit Real-time Vendor Specific TX Interface
5.15.9. CPRI Gigabit Media Independent Interface (GMII)
5.15.10. CPRI IP L1 Control and Status Interface
Visible to Intel only — GUID: beu1583885253128
Ixiasoft
5.9. External ST Source Interface
Signal Name | Width (Bits) | I/O Direction | Description |
---|---|---|---|
ext_source_valid | 1 | Output | Avalon® source valid from L2/L3 parser to external user logic. This signal is synchronous to ext_sink_clk signal. |
ext_source_data | DATA_WIDTH 6 | Output | Avalon® source write data from L2/L3 parser to external user logic. |
ext_source_sop | 1 | Output | Avalon® source start of packet from L2/L3 parser to external user logic. Indicate the beginning of packet. |
ext_source_eop | 1 | Output | Avalon® source end of packet from L2/L3 parser to external user logic. Indicates the end of packet. |
ext_source_empty | LOG2(DATA_WIDTH6/8) | Output | Avalon® source empty from L2/L3 parser to external user logic. Indicates the number of symbols that are empty, that is, do not represent valid data. |
ext_source_error | 1 | Output | Avalon® source error from L2/L3 parser to external user logic. A bit mask to mark errors affecting the data being transferred in the current cycle. |
ext_source_pkt_type | 3 | Output | Indicate frame type of the packet output from L2/L3 parser to external user logic.
This signal is synchronous with ext_source_valid signal. |
6 This is set to 64. This parameter is hidden from user and you can't change it.